5M160ZT100I5 vs 5M160ZT100C4N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng 5M160ZT100I5 sa pamamagitan ng Altera at 5M160ZT100C4N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
5M160ZT100I5 - MAX V CPLD, 160 LE, TQFP-100, Industrial | Intel / Altera
5M160ZT100I5 ✓ NakahandaPagsanggunian na paghahambing
| Parametro | 5M160ZT100I5 | 5M160ZT100C4N |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Device Family | MAX V | — |
| Product Type | CPLD (Complex Programmable Logic Device) | — |
| Logic Elements (LE) | 160 | — |
| Macro Cells | 128 | — |
| Maximum Internal Frequency | 118.3 MHz | — |
| User Flash Memory | 8 Kbits | — |
| Number of I/O Pins | 79 (approx., 100-pin TQFP) | — |
| Core Supply Voltage (VCCINT) | 1.8 V | 1.8 V |
| MultiVolt I/O Bank Supply | 1.2 V to 3.3 V | — |
| Temperature na Operasyon | -40C to +100C (Industrial) | — |
| Packhaging | TQFP-100 (TFQFP) 14x14 mm | TQFP-100 (100-pin) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Configuration Method | Flash (non-volatile, instant-on) | — |
| Programming Interface | JTAG (IEEE 1149.1 / 1532) | — |
| Level ng MSL | 3 (per JEDEC J-STD-020) | 3 |
| Tindminan RoHS | Compliant | Compliant |
| Lead-Free | Yes | Yes |
| Family | — | MAX V |
| Logic Elements (LEs) | — | 160 |
| Macrocells | — | 128 |
| User I/Os | — | 79 |
| User Flash Memory (UFM) | — | 8 Kbits |
| Pin-to-Pin Logic Delay (tPD) | — | 7.9 ns |
| I/O Bank Supply (VCCIO) | — | 1.2 V to 3.3 V |
| Configuration Memory | — | Non-volatile flash |
| Programmability | — | In-system via JTAG (IEEE 1149.1) |
| Operating Temperature Grade | — | Commercial (0 C to +85 C) |
| Logic Array Blocks (LABs) | — | 2 |