5M2210ZF256C4N vs 5M2210ZF256I5N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng 5M2210ZF256C4N sa pamamagitan ng Altera at 5M2210ZF256I5N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
5M2210ZF256C4N - MAX V CPLD, 1700 LE, FBGA-256, C4 Speed | Intel / Altera
5M2210ZF256C4N ✓ NakahandaPagsanggunian na paghahambing
| Parametro | 5M2210ZF256C4N | 5M2210ZF256I5N |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Family | MAX V | — |
| Device | 5M2210Z | — |
| Logic Elements (LEs) | 1700 | — |
| Logic Array Blocks (LABs) | 221 | — |
| User Flash Memory | 8192 bits | 8 Kbits |
| Internal RAM | 212 Kbits | — |
| Maximum User I/O (family) | 203 | — |
| User I/O (this package) | 160 | — |
| Packhaging | FBGA-256 (FineLine BGA) | 256-ball FBGA |
| Temperature na Operasyon | 0C to 85C (Commercial) | — |
| Speed Grade | C4 (tPD ~4 ns class) | — |
| Core Voltage (VCCINT) | 1.8 V | — |
| I/O Bank Voltage (VCCIO) | 1.5 V / 1.8 V / 2.5 V / 3.3 V | — |
| Number of I/O Banks | 4 | — |
| Programming Interface | JTAG (IEEE 1149.1) / IEEE 1532 ISP | JTAG / ISP via Quartus II or Quartus Prime |
| Configuration Method | Internal flash (instant-on < 1 ms) | — |
| Process Technology | 0.30 um 6-metal-layer CMOS | 0.18 um embedded-flash CMOS |
| Tindminan RoHS | Compliant (Pb-free ball finish) | Compliant |
| Device Family | — | MAX V |
| Device Logic Elements | — | 1700 |
| Maximum User I/O Pins | — | 212 |
| Pin-to-Pin Logic Delay (tPD) | — | 7 ns |
| Maximum Operating Frequency | — | [DATA_NEEDED: fMAX] |
| Package Designator | — | ZF256 |
| Operating Temperature Grade | — | Industrial (-40C to +100C junction) |
| Supply Voltage - Core | — | 1.8 V nominal |
| I/O Bank Supply (VCCIO) | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V (per bank) |
| Configuration Memory | — | Internal non-volatile flash (instant-on) |
| Boundary Scan | — | IEEE Std 1149.1 (JTAG) |
| Lead-Free / Halogen-Free | — | Lead-free; halogen-free status [DATA_NEEDED] |
| Level ng MSL | — | MSL3 (per JEDEC J-STD-020, reflow at 260C) |