5M40ZE64A5N vs 5M160ZE64C5N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng 5M40ZE64A5N sa pamamagitan ng Intel at 5M160ZE64C5N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | 5M40ZE64A5N | 5M160ZE64C5N |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Series | MAX V | MAX V |
| Device Family | MAX V (5M40Z) | MAX V (5M160Z) |
| Logic Elements (LE) | 40 | 160 |
| Logic Array Blocks (LAB) | 2 (20 LEs each) | — |
| Maximum User I/O | 30 | — |
| User Flash Memory | 4 Kbit | 8 Kbits |
| Pin-to-Pin Delay (tPD) | 5 ns (commercial speed grade) | — |
| Core Voltage (VCCINT) | 1.8 V | — |
| I/O Voltage (VCCIO) | 1.2 V to 3.3 V (4 banks) | — |
| Hanay ng Temperature na Operasyon | 0 C to +85 C (commercial) | — |
| Packhaging | EQFP-64 (E64, 10x10 mm, 0.5 mm pitch) | 64-pin EQFP (E64) with exposed pad |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| JTAG Support | IEEE 1149.1 boundary-scan | — |
| Configuration Method | On-chip non-volatile flash (instant-on) | — |
| Tindminan RoHS | Compliant (Pb-free) | Compliant |
| Level ng MSL | 3 (168 hours) | 3 |
| Macrocells | — | 128 |
| User I/O Pins | — | 54 |
| Maximum Operating Frequency (fMAX) | — | 118.3 MHz |
| Pin-to-Pin Logic Delay (tPD) | — | 1.4 ns (per datasheet) |
| Configuration Memory | — | Non-volatile Flash |
| Supply Voltage (VCCINT) | — | 1.8 V |
| I/O Bank Voltage (VCCIO) | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V |
| Temperature na Operasyon | — | 0°C to +85°C (commercial) |
| Programming Interface | — | JTAG (IEEE 1149.1) / In-system |