5M40ZE64C4N vs 5M80ZE64C4 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng 5M40ZE64C4N sa pamamagitan ng Intel at 5M80ZE64C4 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | 5M40ZE64C4N | 5M80ZE64C4 |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Family | MAX V | MAX V |
| Logic Elements (LE) | 32 | — |
| User Flash Memory | 4 Kbit | — |
| Pin-to-Pin Delay (tPD1) | 7.5 ns | — |
| Maximum Internal Frequency | 184 MHz | 184 MHz |
| Number of I/O Pins | 30 (approx.) | — |
| Supply Voltage (VCCINT) | 1.8 V | — |
| I/O Bank Voltage | 1.8 V / 2.5 V / 3.3 V | — |
| Process Technology | 0.18 µm flash-based CMOS | — |
| Configuration Memory | Non-volatile flash (internal) | Non-volatile flash (internal) |
| Programmable Pull-up Resistors | Yes (per-pin, internal) | — |
| Programming Interface | JTAG (IEEE 1149.1) | JTAG (IEEE 1149.1) |
| Temperature na Operasyon | 0 °C to +85 °C (commercial) | 0 C to +85 C (Commercial) |
| Packhaging | EQFP-64 (Plastic Enhanced QFP, 64 pins) | EQFP-64 (9 x 9 mm, 0.4 mm pitch) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Level ng MSL | 3 (per JEDEC J-STD-020) | [DATA_NEEDED: MSL rating] |
| Tindminan RoHS | Compliant | Compliant |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Logic Elements (LEs) | — | 64 |
| Macro Cells | — | 64 |
| User I/Os | — | 54 |
| Propagation Delay (tPD) | — | 7.9 ns |
| Core Supply Voltage (VCCINT) | — | 1.8 V |
| I/O Supply Voltage (VCCIO) | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V |
| Bilang ng Pin | — | 64 |
| Speed Grade | — | C4 |
| Lead-Free | — | Yes |