5M570ZM100C4N vs 5M570ZM100A5N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng 5M570ZM100C4N sa pamamagitan ng Altera at 5M570ZM100A5N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
5M570ZM100A5N - MAX V 440 Macrocells CPLD, 100-ball MBGA, 1.8V | Intel
5M570ZM100A5N ✓ NakahandaPagsanggunian na paghahambing
| Parametro | 5M570ZM100C4N | 5M570ZM100A5N |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Family | MAX V | MAX V |
| Series | 5M570Z | — |
| Macro Cells | 440 | — |
| Logic Elements (LEs) | 440 | — |
| Maximum Internal Frequency | 184.1 MHz | 118.3 MHz |
| Pin-to-Pin Delay (tPD) | 9.0 ns | — |
| Core Voltage | 1.8 V | — |
| Temperature na Operasyon | 0 C to +85 C (commercial) | — |
| Packhaging | 100-ball MBGA (Micro BGA), tray | 100-ball Micro BGA (MBGA, 6x6 mm) |
| Configuration Memory | Non-volatile flash, instant-on | — |
| User Flash Memory | Yes (8 Kbits) | — |
| Programmable I/O Pins | [DATA_NEEDED: I/O pin count for M100 package] | — |
| I/O Standards | LVTTL, LVCMOS 1.5/1.8/2.5/3.3 V, PCI | — |
| Programming Interface | JTAG (IEEE 1149.1), in-system programmable | JTAG (IEEE 1149.1) / ISP |
| Uri ng Pagpapasok | Surface Mount | Surface Mount (BGA) |
| Tindminan RoHS | Compliant | Compliant |
| Lead-Free | Yes | Yes |
| Macrocells | — | 440 |
| User I/Os | — | 74 |
| Logic Elements | — | 570 |
| Logic Array Blocks (LABs) | — | 8 (16 macrocells per LAB) |
| Core Supply Voltage (VCCINT) | — | 1.8 V |
| I/O Bank Voltage (VCCIO) | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt) |
| Standby Current | — | 27 uA (typical) |
| On-chip Oscillator | — | Yes |
| Non-volatile Configuration | — | Flash (instant-on) |
| Operating Temperature Grade | — | Industrial |