5M570ZT100I5N vs 5M80ZT100I5N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng 5M570ZT100I5N sa pamamagitan ng Intel at 5M80ZT100I5N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | 5M570ZT100I5N | 5M80ZT100I5N |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Series | MAX V | — |
| Family | MAX V CPLD | MAX V CPLD |
| Logic Elements | 570 | — |
| Macrocells | 440 | — |
| Maximum User I/O | 79 | — |
| Propagation Delay (tPD) | 9 ns | — |
| Maximum Internal Frequency | 118.3 MHz | — |
| Number of Dedicated Clock Pins | 8 | — |
| Core Supply Voltage | 1.8 V | — |
| I/O Bank Voltage Support | 1.8 V / 2.5 V / 3.3 V / 5.0 V (MultiVolt) | — |
| Temperature na Operasyon | -40C to +100C (Industrial) | — |
| Packhaging | 100-pin TQFP (14 x 14 mm) | TQFP-100 (100 pins, 0.5 mm pitch) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Configuration Memory | Flash (non-volatile, instant-on) | Internal non-volatile flash (instant-on) |
| Programming Interface | JTAG (IEEE 1149.1) / ISP | — |
| Level ng MSL | 3 | MSL3 (per JEDEC J-STD-020) |
| Tindminan RoHS | Compliant | Compliant |
| Logic Elements (LE) | — | 80 |
| Macrocells (approx.) | — | 160 |
| User I/O Pins | — | 64 |
| Pin-to-Pin Logic Delay (tPD) | — | 7.5 ns |
| Core Supply Voltage (VCCINT) | — | 1.71 V to 1.89 V (1.8 V typical) |
| I/O Supply Voltage (VCCIO) | — | 1.2 V / 1.5 V / 1.8 V / 2.5 V / 3.3 V |
| Operating Temperature (Industrial) | — | -40 °C to +100 °C |
| UFM (User Flash Memory) | — | Up to 8 Kbits user-accessible |
| JTAG / ISP | — | IEEE 1149.1 boundary-scan + in-system programming |