5M570ZT144I5N vs 5M570ZT144C4N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng 5M570ZT144I5N sa pamamagitan ng Altera at 5M570ZT144C4N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | 5M570ZT144I5N | 5M570ZT144C4N |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Family | MAX V | MAX V CPLD |
| Device Sub-family | 5M570Z | — |
| Logic Elements (LEs) | 570 | 570 |
| Macro Cells | 440 | 440 |
| Maximum User I/O | 212 | — |
| Packhaging | 144-pin TQFP | 144-pin TQFP (T144) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Core Voltage | 1.8 V | — |
| I/O Standards | LVCMOS 3.3/2.5/1.8/1.5 V, LVTTL | — |
| Propagation Delay (tPD) | 9 ns | — |
| Internal Operating Frequency | 118.3 MHz (typical) | — |
| Speed Grade | 5 | — |
| Temperature Grade | Industrial (I5N: -40C to +100C) | — |
| Configuration Memory | Internal flash (non-volatile) | Internal flash, non-volatile, ISP via JTAG |
| Programming Interface | JTAG (IEEE 1532 / IEEE 1149.1) | — |
| Tindminan RoHS | Compliant | Compliant |
| User I/O Pins | — | 114 |
| Pin-to-Pin Delay (tPD) | — | 9.5 ns |
| Maximum Operating Frequency | — | 184.1 MHz |
| Core Supply Voltage | — | 1.8 V |
| I/O Bank Supply Voltage (VCCIO) | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V |
| I/O Banks | — | 8 |
| Temperature na Operasyon | — | 0 °C to +85 °C (commercial) |
| Configuration Interface | — | JTAG (IEEE 1149.1) / passive serial |
| Level ng MSL | — | [DATA_NEEDED: MSL level] |