5M80ZE64C4N vs 5M80ZE64I5N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng 5M80ZE64C4N sa pamamagitan ng Intel at 5M80ZE64I5N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | 5M80ZE64C4N | 5M80ZE64I5N |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Family | MAX V | MAX V |
| Device Logic Elements | 64 | — |
| Number of Macro Cells | 64 | — |
| Number of Logic Array Blocks (LABs) | 4 | — |
| Maximum User I/O Pins | 79 | — |
| Maximum Operating Frequency | 184.1 MHz | — |
| Propagation Delay (tPD) | [DATA_NEEDED: tPD in ns] | 7.9 ns |
| Core Voltage (VCCINT) | 1.8 V | — |
| I/O Voltage (VCCIO) | 1.5V / 1.8V / 2.5V / 3.3V | — |
| Programmability | In-system via JTAG (IEEE 1149.1) | — |
| Configuration Memory | Non-volatile flash, instant-on | — |
| Global Clocks | 2 | — |
| User Flash Memory | On-chip (8 Kbits) | — |
| Operating Temperature Grade | Commercial (0C to +85C) | — |
| Speed Grade | C4 | — |
| Packhaging | 64-pin EQFP (E64) with exposed pad | EQFP-64 (HTFQFP-64, 9x9 mm, 0.4 mm pitch) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Level ng MSL | [DATA_NEEDED: MSL level] | [DATA_NEEDED: MSL level] |
| Tindminan RoHS | Compliant (lead-free) | Compliant |
| Hot Socketing | Supported | — |
| Device Type | — | CPLD - Complex Programmable Logic Device |
| Macro Cells (Logic Elements) | — | 64 |
| User I/Os | — | 30 |
| Internal Frequency (fMAX) | — | 118.3 MHz |
| Core Supply Voltage (VCCINT) | — | 1.8 V |
| I/O Supply Voltage (VCCIO) | — | 1.2 V to 3.3 V |
| Logic Block Number | — | 4 |
| Temperature na Operasyon | — | -40C to +100C (Industrial) |
| Programming Interface | — | JTAG (IEEE 1149.1) / ISP via Quartus II |
| Non-volatile Configuration | — | Yes (Flash-based) |