5M80ZM64C4N vs 5M80ZM64C5N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng 5M80ZM64C4N sa pamamagitan ng Intel at 5M80ZM64C5N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | 5M80ZM64C4N | 5M80ZM64C5N |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Family | MAX V | — |
| Device | 5M80Z | — |
| Logic Elements (LE) | 64 | — |
| Macro Cells | 64 | — |
| Maximum User I/O | 79 | — |
| User Flash Memory | 30 Kbit | — |
| User SRAM | 8 Kbit | — |
| Maximum Operating Frequency | 184.1 MHz | — |
| Pin-to-Pin Logic Delay (tPD1) | 7.5 ns | — |
| Core Supply Voltage | 1.8 V | — |
| Multi-Volt I/O Support | 1.8 V / 2.5 V / 3.3 V / 5.0 V | — |
| Packhaging | 64-ball MBGA (Micro FBGA), 4.5 mm × 4.5 mm, 0.5 mm pitch | 64-MBGA |
| Configuration Memory | Non-volatile on-chip flash | — |
| Programming Interface | JTAG (IEEE 1149.1) / ISP | — |
| Operating Temperature (Commercial) | 0 °C to +85 °C | — |
| Tindminan RoHS | Compliant | unknown |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Architecture Family | — | MAX V |
| Macrocell Count | — | 64 macrocells |
| Propagation Delay | — | 7.5 ns |
| Maximum Internal Frequency | — | 118.3 MHz |
| User I/O Count | — | 30 I/Os |
| Programmable Logic Type | — | FLASH |
| Technology | — | CMOS |
| Package Pin Count | — | 64 pins |
| Volte ng Pagbibigay | — | [DATA_NEEDED: supply voltage] |
| Hanay ng Temperature na Operasyon | — | [DATA_NEEDED: operating temperature range] |
| I/O Standard Support | — | [DATA_NEEDED: supported I/O standards] |
| REACH Status | — | unknown |
| AEC-Q100 Qualification | — | unknown |
| Lead-Free Status | — | unknown |
| Halogen-Free Status | — | unknown |
| JTAG Support | — | [DATA_NEEDED: JTAG support] |