5M80ZM68C4N vs 5M80ZM64C5N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng 5M80ZM68C4N sa pamamagitan ng Intel at 5M80ZM64C5N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | 5M80ZM68C4N | 5M80ZM64C5N |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Series | MAX V | — |
| Device Family | 5M80Z | — |
| Logic Elements (LE) | 80 | — |
| Maximum User I/O | 160 (device-dependent) | — |
| Packhaging | 68-ball MBGA (Micro FineLine BGA) | 64-MBGA |
| Speed Grade | -4 | — |
| Temperature na Operasyon | 0C to +85C (Commercial) | — |
| Core Voltage | 1.8 V | — |
| I/O Voltage Support | 1.2 V to 3.3 V LVCMOS / LVTTL | — |
| Configuration Memory | Internal non-volatile flash | — |
| Program Interface | JTAG (IEEE 1149.1) / ISP | — |
| Process | 0.30 um CMOS, 6 metal layers | — |
| Typical Static Power | 2.5 mW | — |
| Tindminan RoHS | Compliant | unknown |
| Uri ng Pagpapasok | Surface Mount (BGA) | — |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Architecture Family | — | MAX V |
| Macrocell Count | — | 64 macrocells |
| Propagation Delay | — | 7.5 ns |
| Maximum Internal Frequency | — | 118.3 MHz |
| User I/O Count | — | 30 I/Os |
| Programmable Logic Type | — | FLASH |
| Technology | — | CMOS |
| Package Pin Count | — | 64 pins |
| Volte ng Pagbibigay | — | [DATA_NEEDED: supply voltage] |
| Hanay ng Temperature na Operasyon | — | [DATA_NEEDED: operating temperature range] |
| I/O Standard Support | — | [DATA_NEEDED: supported I/O standards] |
| REACH Status | — | unknown |
| AEC-Q100 Qualification | — | unknown |
| Lead-Free Status | — | unknown |
| Halogen-Free Status | — | unknown |
| JTAG Support | — | [DATA_NEEDED: JTAG support] |