5M80ZT100C5N vs 5M80ZT100I5N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng 5M80ZT100C5N sa pamamagitan ng Intel at 5M80ZT100I5N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | 5M80ZT100C5N | 5M80ZT100I5N |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Manufacturer | Intel (formerly Altera) | — |
| Series | MAX V | — |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Logic Elements | 80 | — |
| Macrocells | 64 | — |
| Pin-to-Pin Delay (tPD) | 7.5 ns | — |
| User I/Os | 79 | — |
| User Flash Memory | 8 Kbits | — |
| Package Type | 100-pin TQFP (T100) | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Temperature na Operasyon | 0C to +85C (commercial) | — |
| Core Voltage | 1.71 V to 1.89 V | — |
| I/O Voltage (VCCIO) | 1.2 V to 3.3 V LVCMOS/LVTTL | — |
| Programming Interface | JTAG (IEEE 1149.1) | — |
| Configuration Memory | Non-volatile Flash | Internal non-volatile flash (instant-on) |
| Tindminan RoHS | Compliant | Compliant |
| Lead-Free | Yes | — |
| Family | — | MAX V CPLD |
| Logic Elements (LE) | — | 80 |
| Macrocells (approx.) | — | 160 |
| User I/O Pins | — | 64 |
| Packhaging | — | TQFP-100 (100 pins, 0.5 mm pitch) |
| Pin-to-Pin Logic Delay (tPD) | — | 7.5 ns |
| Core Supply Voltage (VCCINT) | — | 1.71 V to 1.89 V (1.8 V typical) |
| I/O Supply Voltage (VCCIO) | — | 1.2 V / 1.5 V / 1.8 V / 2.5 V / 3.3 V |
| Operating Temperature (Industrial) | — | -40 °C to +100 °C |
| UFM (User Flash Memory) | — | Up to 8 Kbits user-accessible |
| JTAG / ISP | — | IEEE 1149.1 boundary-scan + in-system programming |
| Level ng MSL | — | MSL3 (per JEDEC J-STD-020) |