A3PE3000-FG484 vs A3PE3000L-FGG484I Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng A3PE3000-FG484 sa pamamagitan ng Microchip Technology at A3PE3000L-FGG484I sa pamamagitan ng Microchip Technology. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Microchip Technology
A3PE3000-FG484 - ProASIC3E 3M-Gate Flash FPGA 484-BGA | Microchip
A3PE3000-FG484 ✓ NakahandaMicrochip Technology
A3PE3000L-FGG484I - 3M-Gate ProASIC3L Flash FPGA | Microchip
A3PE3000L-FGG484I ✓ NakahandaPagsanggunian na paghahambing
| Parametro | A3PE3000-FG484 | A3PE3000L-FGG484I |
|---|---|---|
| Brand | Microchip Technology | Microchip Technology |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Family | ProASIC3E Flash FPGA | ProASIC3L (Flash FPGA) |
| System Gates | 3000000 | 3000000 |
| Logic Cells (DFEs) | 75264 | — |
| User I/O | 341 | — |
| Core Voltage | 1.5 V | 1.2 V to 1.5 V |
| System Frequency | 231 MHz | — |
| Process Technology | 130 nm flash CMOS | 130 nm, 7-layer metal (6 copper), flash-based CMOS |
| Configuration Memory | On-chip flash (non-volatile, single-chip) | — |
| Packhaging | 484-ball FBGA (FG484), 23 x 23 mm, 1.0 mm pitch, 2.23 mm height | 484-FPBGA (23 x 23 mm, 1 mm pitch, FBGA-484) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Soft CPU Support | Optional soft ARM support | — |
| Differential I/O Standards | LVDS, LVPECL | — |
| Footprint Compatibility | FG256 and FG484 footprint-compatible | — |
| Packaging | Tray | Tray |
| Tindminan RoHS | G suffix = RoHS compliant (FG484 non-G variant per datasheet ordering info) | RoHS3 Compliant |
| Temperature na Operasyon | [DATA_NEEDED: operating temperature range] | -40 C to +100 C (TJ), industrial (I) |
| Embedded Memory | [DATA_NEEDED: embedded block RAM capacity] | — |
| Logic Cells (CLBs) | — | 75264 |
| User I/Os (this package) | — | 341 |
| Embedded SRAM | — | 504 kbits true dual-port |
| Supply Voltage Range | — | 1.14 V to 1.575 V |
| Configuration | — | Nonvolatile flash, Live-At-Power-Up (Level 0), single chip |
| Low Power Feature | — | Flash*Freeze technology |
| Logic Family | — | CMOS |
| Unit Price | — | [DATA_NEEDED: verified unit price not present in source data] |