A3PE3000L-1FG896I vs A3PE3000L-FGG896 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng A3PE3000L-1FG896I sa pamamagitan ng Microchip Technology at A3PE3000L-FGG896 sa pamamagitan ng Microchip Technology. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Microchip Technology
A3PE3000L-1FG896I - 3M-Gate Low-Power Flash FPGA | Microchip
A3PE3000L-1FG896I ✓ NakahandaMicrochip Technology
A3PE3000L-FGG896 - 3M Gate Flash FPGA | Microchip Technology
A3PE3000L-FGG896 ✓ NakahandaPagsanggunian na paghahambing
| Parametro | A3PE3000L-1FG896I | A3PE3000L-FGG896 |
|---|---|---|
| Brand | Microchip Technology | Microchip Technology |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Family | ProASIC3L (Flash FPGA) | — |
| System Gates | 3,000,000 | 3,000,000 |
| Logic Cells | 75,264 | 75,264 |
| User I/O | 620 | — |
| Core Voltage | 1.2 V to 1.5 V | — |
| Process Technology | 130 nm CMOS flash | 130-nm, 7-layer metal (6 copper), flash-based |
| Maximum Frequency | 892.86 MHz | — |
| Packhaging | 896-ball FBGA (FG896), 1.00 mm pitch | 896-ball FBGA (FGG896), 1.0 mm pitch |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Temperature na Operasyon | -40C to +85C (Industrial) | 0 C to +70 C |
| Configuration Memory | On-chip Flash (non-volatile, single chip) | — |
| Low Power Feature | Flash*Freeze Technology | — |
| JTAG Boundary Scan | IEEE 1149.1 | — |
| Input Options | Schmitt trigger option on single-ended inputs | — |
| Pull Options | Weak pull-up / pull-down | — |
| Reprogrammability | Live reprogrammable | — |
| Speed Grade | -1 | [DATA_NEEDED: speed grade for -FGG896 base part] |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance status] |
| Total SRAM | — | 504 kbits |
| User I/Os (FGG896) | — | 620 |
| Core Supply Voltage | — | 1.2 V to 1.5 V |
| I/O Supply Voltage | — | [DATA_NEEDED: I/O supply voltage range] |
| Logic Family | — | CMOS |
| Flash*Freeze Support | — | Yes |
| Live-At-Power-Up | — | Level 0 support |
| Reconfiguration | — | Reprogrammable (in-system programmable) |
| Lead-Free Finish | — | Yes |
| Clock Inputs | — | [DATA_NEEDED: number of clock conditioning circuits/PLLs] |
| Power Consumption | — | [DATA_NEEDED: typical static/dynamic power] |
| Ball Count | — | 896 |