A3PE3000L-FGG896 vs A3PE3000L-1FGG896I Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng A3PE3000L-FGG896 sa pamamagitan ng Microchip Technology at A3PE3000L-1FGG896I sa pamamagitan ng Microchip Technology. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Microchip Technology
A3PE3000L-FGG896 - 3M Gate Flash FPGA | Microchip Technology
A3PE3000L-FGG896 ✓ NakahandaMicrochip Technology
A3PE3000L-1FGG896I - 3M Gate Low-Power Flash FPGA | Microchip
A3PE3000L-1FGG896I ✓ NakahandaPagsanggunian na paghahambing
| Parametro | A3PE3000L-FGG896 | A3PE3000L-1FGG896I |
|---|---|---|
| Brand | Microchip Technology | Microchip Technology |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| System Gates | 3,000,000 | 3000000 |
| Logic Cells | 75,264 | — |
| Total SRAM | 504 kbits | — |
| User I/Os (FGG896) | 620 | — |
| Packhaging | 896-ball FBGA (FGG896), 1.0 mm pitch | 896-ball FBGA, 1 mm pitch |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Core Supply Voltage | 1.2 V to 1.5 V | — |
| I/O Supply Voltage | [DATA_NEEDED: I/O supply voltage range] | — |
| Temperature na Operasyon | 0 C to +70 C | -40C to +85C (industrial, I suffix) |
| Logic Family | CMOS | CMOS |
| Process Technology | 130-nm, 7-layer metal (6 copper), flash-based | 130-nm, 7-layer metal (6 copper), flash-based CMOS |
| Flash*Freeze Support | Yes | — |
| Live-At-Power-Up | Level 0 support | — |
| Reconfiguration | Reprogrammable (in-system programmable) | — |
| Lead-Free Finish | Yes | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS status] |
| Clock Inputs | [DATA_NEEDED: number of clock conditioning circuits/PLLs] | — |
| Speed Grade | [DATA_NEEDED: speed grade for -FGG896 base part] | -1 |
| Power Consumption | [DATA_NEEDED: typical static/dynamic power] | — |
| Ball Count | 896 | — |
| Family | — | ProASIC3L (Flash FPGAs with Flash*Freeze) |
| User I/O | — | 620 |
| Embedded SRAM | — | 504 kbits true dual-port |
| Core Voltage | — | 1.2 V to 1.5 V |
| PLLs | — | 6 |
| Maximum System Performance | — | Approx. 272 MHz |
| Configuration Technology | — | Nonvolatile flash, single-chip, Instant On |
| Low Power Feature | — | Flash*Freeze Technology |
| Power-Up Support | — | Live at Power-Up Level 0 |