A42MX09-2PLG84 vs A42MX09-2PLG84I Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng A42MX09-2PLG84 sa pamamagitan ng Microchip Technology at A42MX09-2PLG84I sa pamamagitan ng Microchip Technology. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Microchip Technology
A42MX09-2PLG84 - 14K Gate 5V FPGA 84-PLCC | Microchip
A42MX09-2PLG84 ✓ NakahandaMicrochip Technology
A42MX09-2PLG84I - 14K Gate 5V FPGA 84-PLCC | Microchip
A42MX09-2PLG84I ✓ NakahandaPagsanggunian na paghahambing
| Parametro | A42MX09-2PLG84 | A42MX09-2PLG84I |
|---|---|---|
| Brand | Microchip Technology | Microchip Technology |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Family | 42MX (MX FPGA) | MX (42MX) |
| System Gates | 14000 | 14000 |
| Logic Cells | 336 | 336 |
| User I/O | 72 | — |
| Speed Grade | -2 | -2 |
| Clock-to-Out | 5.6 ns | 5.6 ns |
| Internal Performance | up to 250 MHz (161 MHz / 269 MHz grade limits per FindIC) | — |
| Dual-Port SRAM | up to 2.5 kbits (family max), 5 ns access | Up to 2.5 kbits configurable |
| FIFO Performance | 100 MHz (family) | — |
| Core Voltage | 3.3 V to 5 V (dual voltage, 0.45 um technology) | — |
| Supply Voltage Range | 3.0 V to 3.6 V and 4.5 V to 5.5 V | — |
| Technology | 0.45 um antifuse | — |
| Programming Type | One-Time Programmable (antifuse), non-volatile | — |
| Packhaging | 84-LCC (J-Lead) / PLCC-84 | 84-PLCC (J-Lead), surface mount |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Temperature na Operasyon | [DATA_NEEDED: operating temperature range] | -40C to +85C (Industrial) |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | Lead Free |
| User I/O Pins | — | 72 |
| Core Supply Voltage | — | 4.5 V to 5.5 V |
| I/O Supply Voltage | — | 3 V to 3.6 V (dual supply) |
| Dual-Port SRAM Access Time | — | 5 ns |
| Maximum Performance | — | 250 MHz |
| Process Technology | — | 0.45 um |
| Number of Logic Blocks | — | [DATA_NEEDED: number of logic blocks] |