A42MX09-FPQ100 vs A42MX16-PQ100 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng A42MX09-FPQ100 sa pamamagitan ng Microchip Technology at A42MX16-PQ100 sa pamamagitan ng Microchip Technology. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Microchip Technology
A42MX09-FPQ100 - 14K Gate Antifuse FPGA PQFP-100 | Microchip
A42MX09-FPQ100 ✓ NakahandaMicrochip Technology
A42MX16-PQ100 - 24K Gates 5V FPGA, 100-PQFP | Microchip
A42MX16-PQ100 ✓ NakahandaPagsanggunian na paghahambing
| Parametro | A42MX09-FPQ100 | A42MX16-PQ100 |
|---|---|---|
| Brand | Microchip Technology | Microchip Technology |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Family | 42MX (antifuse FPGA) | 42MX (Actel MX) |
| System Gates | 14,000 equivalent (to 54,000 system gates family range) | — |
| Logic Cells | 684 | 608 |
| CLBs | 684 | — |
| Dual-Port SRAM | 2.5 kbits configurable | — |
| Volte ng Pagbibigay | 3.3 V / 5 V | 3.3 V / 5 V |
| Technology | 0.45 um CMOS antifuse | — |
| Maximum Toggle Rate | 77 MHz / 129 MHz | — |
| Maksimum na Taktiko ng Oras | 117 MHz (per Microchip USA listing) | — |
| User I/O | Up to 202 (family max) | — |
| Programming Type | One-Time Programmable (OTP) antifuse | — |
| Packhaging | PQFP-100 (R-PQFP-G100) | 100-PQFP (BQFP), surface mount |
| Package Dimensions | 14 mm x 20 mm | — |
| Terminal Pitch | 0.65 mm | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Temperature na Operasyon | -55C to +125C (A42MX09-FPQ100M variant); [DATA_NEEDED: standard variant range] | [DATA_NEEDED: operating temperature range] |
| Logic Gates | — | 24K gates (up to 54,000 system gates) |
| System Frequency | — | 103 MHz / 172 MHz |
| Process Technology | — | 0.45 um |
| Embedded SRAM | — | 2.5 kbits configurable dual-port |
| Programming Technology | — | Antifuse (one-time programmable, non-volatile) |
| User I/O (PQ100 package) | — | 83 |
| Maximum User I/O (device) | — | Up to 202 |
| Pin Locking | — | 100% pin locking |
| Tindminan RoHS | — | [DATA_NEEDED: RoHS status] |
| Boundary Scan | — | Yes (JTAG boundary-scan register chain, TDI to TDO) |