A42MX16-3PQG100I vs A42MX16-PQ100 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng A42MX16-3PQG100I sa pamamagitan ng Microchip Technology at A42MX16-PQ100 sa pamamagitan ng Microchip Technology. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Microchip Technology
A42MX16-3PQG100I - 24K Gate 5V FPGA 100-PQFP | Microchip
A42MX16-3PQG100I ✓ NakahandaMicrochip Technology
A42MX16-PQ100 - 24K Gates 5V FPGA, 100-PQFP | Microchip
A42MX16-PQ100 ✓ NakahandaPagsanggunian na paghahambing
| Parametro | A42MX16-3PQG100I | A42MX16-PQ100 |
|---|---|---|
| Brand | Microchip Technology | Microchip Technology |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Family | MX (42MX) FPGA | 42MX (Actel MX) |
| System Gates | 24K | — |
| Logic Cells | 608 | 608 |
| User I/O | 83 | — |
| Speed Grade | -3 | — |
| System Frequency | 142 MHz / 237 MHz | 103 MHz / 172 MHz |
| Core / I/O Voltage | 3.3 V / 5 V | — |
| Technology | 0.45 um CMOS antifuse | — |
| Program Type | One-Time Programmable (antifuse), non-volatile | — |
| Packhaging | 100-BQFP (PQFP), 0.65 mm pitch | 100-PQFP (BQFP), surface mount |
| Temperature na Operasyon | -40C to +85C (industrial) | [DATA_NEEDED: operating temperature range] |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Lead Finish | Lead free | — |
| Tindminan RoHS | Compliant | [DATA_NEEDED: RoHS status] |
| Configuration | Instant-on, no external configuration PROM | — |
| Logic Gates | — | 24K gates (up to 54,000 system gates) |
| Process Technology | — | 0.45 um |
| Volte ng Pagbibigay | — | 3.3 V / 5 V |
| Embedded SRAM | — | 2.5 kbits configurable dual-port |
| Programming Technology | — | Antifuse (one-time programmable, non-volatile) |
| User I/O (PQ100 package) | — | 83 |
| Maximum User I/O (device) | — | Up to 202 |
| Pin Locking | — | 100% pin locking |
| Boundary Scan | — | Yes (JTAG boundary-scan register chain, TDI to TDO) |