A42MX24-2PLG84I vs A42MX24-1PLG84 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng A42MX24-2PLG84I sa pamamagitan ng Microchip Technology at A42MX24-1PLG84 sa pamamagitan ng Microchip Technology. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Microchip Technology
A42MX24-2PLG84I - 36K Gate Antifuse FPGA, 84-PLCC | Microchip
A42MX24-2PLG84I ✓ NakahandaMicrochip Technology
A42MX24-1PLG84 - 36K Gate 5V FPGA | Microchip | 84-PLCC
A42MX24-1PLG84 ✓ NakahandaPagsanggunian na paghahambing
| Parametro | A42MX24-2PLG84I | A42MX24-1PLG84 |
|---|---|---|
| Brand | Microchip Technology | Microchip Technology |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Family | MX (42MX) | MX |
| System Gates | 36000 gates | 36000 |
| Logic Cells | 912 cells | — |
| User I/O | 72 | — |
| Technology | 0.45 um antifuse | — |
| Core Architecture Voltage | 5.0 V | — |
| I/O Voltage Support | 3.3 V / 5.0 V mixed | — |
| Speed Grade | -2 | -1 |
| Programmability | One-Time Programmable (antifuse) | — |
| Temperature na Operasyon | -40C to +85C (Industrial) | -40°C to +85°C |
| Packhaging | 84-PLCC (J-Lead) | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Configuration | No external boot device required | — |
| Dedicated Decode Blocks | D-modules (wide-input AND, CPLD-like) | — |
| Tindminan RoHS | Lead Free (per Kynix listing) | Compliant |
| Packaging | Tray | — |
| Primary Applications | ASIC alternative, legacy PLD integration | — |
| Logic Cells / Logic Blocks | — | 912 |
| Number of I/O | — | 72 |
| Package Type | — | 84-PLCC (J-Lead) |
| Logic Family | — | CMOS |
| Supply Voltage (3.3V) | — | 3.0V to 3.6V |
| Supply Voltage (5V) | — | 4.75V to 5.25V |
| Process Technology | — | 0.45um |
| Configurable Dual-Port SRAM | — | 2.5 kbits |
| Wide-Decode Circuitry | — | Yes |