A54SX72A-FG484I vs A54SX72A-FG484M Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng A54SX72A-FG484I sa pamamagitan ng Microchip Technology at A54SX72A-FG484M sa pamamagitan ng Microchip Technology. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Microchip Technology
A54SX72A-FG484I - 108K-Gate Antifuse FPGA, 484 FBGA | Microchip
A54SX72A-FG484I ✓ NakahandaMicrochip Technology
A54SX72A-FG484M - 108K-Gate Antifuse FPGA, 484-BGA | Microchip
A54SX72A-FG484M ✓ NakahandaPagsanggunian na paghahambing
| Parametro | A54SX72A-FG484I | A54SX72A-FG484M |
|---|---|---|
| Brand | Microchip Technology | Microchip Technology |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Family | SX-A (Antifuse FPGA) | SX-A (antifuse FPGA) |
| System Gates | 108000 gates | 108000 gates |
| Logic Cells / Modules | 6036 cells | — |
| User I/O | 360 | 360 |
| Core Supply Voltage | 2.5 V | 2.5 V |
| Max System Frequency (std speed) | 217 MHz | — |
| Process Technology | 0.25um/0.22um CMOS | — |
| Programmability | One-time programmable (antifuse) | One-time programmable (OTP) antifuse |
| Packhaging | 484-ball FBGA (1.0 mm pitch) | 484-ball FBGA (FG484) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Temperature na Operasyon | Industrial (I suffix), -40C to +85C | [DATA_NEEDED: Operating Temperature] |
| Tindminan RoHS | RoHS Compliant | [DATA_NEEDED: RoHS Status] |
| Clock Resources | CLKA, CLKB, QCLK quadrant clock networks | — |
| Configuration | Non-volatile, no external configuration device | — |
| Manufacturer Part Suffix | FG484 = 484-ball FBGA, I = industrial temperature | — |
| Power | Low-power 2.5V operation | — |
| Typical Gates | — | 72000 gates |
| Logic Modules (Cells) | — | 4024 cells (6036 CLBs reported) |
| Maksimum na Taktiko ng Oras | — | 217 MHz (172 MHz system clock per Microchip USA) |
| Combinatorial CLB Delay | — | 1.8 ns |
| I/O Supply Voltage Range | — | 2.25 V to 5.25 V |
| I/O Standards Supported | — | 2.5 V, 3.3 V, 5.0 V |
| Technology | — | 0.22 um / 0.25 um CMOS antifuse |
| Packaging | — | Tray |