AD9609BCPZ-80 vs AD9613BCPZ-250 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng AD9609BCPZ-80 sa pamamagitan ng Analog Devices at AD9613BCPZ-250 sa pamamagitan ng Analog Devices. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Analog Devices
AD9613BCPZ-250 - 12-Bit 250 MSPS Dual ADC | Analog Devices
AD9613BCPZ-250 ✓ NakahandaPagsanggunian na paghahambing
| Parametro | AD9609BCPZ-80 | AD9613BCPZ-250 |
|---|---|---|
| Brand | Analog Devices | Analog Devices |
| Kategorya | ADC/DAC | ADC/DAC |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Number of Bits | 10 bit | — |
| Number of Channels | 1 | 2 (dual, simultaneous sampling) |
| Architecture | Pipelined | Pipelined |
| Rate ng Pagkupita | 80 MSPS | — |
| Sampling Rate (Family Options) | 20 / 40 / 65 / 80 MSPS (selected by part suffix) | — |
| Analog Supply Voltage | 1.8 V | 1.8 V |
| Digital Output Supply | 3.3 V | — |
| Input Type | Single-ended / differential | Differential analog |
| Data Interface | Serial, SPI™ control port; parallel or 1-pair LVDS data output | — |
| On-chip Reference | Yes (1.0 V typical, external-reference option) | — |
| SNR (fIN = 9.7 MHz) | 61.5 dBFS | — |
| SNR (fIN = 200 MHz) | 61.0 dBFS | — |
| SFDR (fIN = 9.7 MHz) | 75 dBc | — |
| SFDR (fIN = 200 MHz) | 73 dBc | — |
| Hanay ng Temperature na Operasyon | -40 °C to +85 °C | -40C to +85C (industrial) |
| Packhaging | 32-LFCSP-VQ (5x5 mm) with exposed pad | 64-LFCSP-VQ (9x9 mm) with exposed pad |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Power-Down Pin | SDIO/PDWN (CMOS-compatible) | — |
| Pin Compatibility | Pin-compatible with AD9629 (12-bit) and AD9649 (14-bit) families | — |
| Tindminan RoHS | Compliant | Compliant |
| Packaging (Shipping) | Tray | — |
| Pangangasiwaan | — | 12 bit |
| Sampling Rate (max) | — | 250 MSPS per channel |
| Digital Supply Voltage | — | [DATA_NEEDED: digital supply voltage] |
| Output Interface | — | Parallel LVDS |
| Input Bandwidth | — | [DATA_NEEDED: analog input bandwidth] |
| ENOB (typical) | — | [DATA_NEEDED: ENOB at fIN] |
| SNR (typical) | — | [DATA_NEEDED: SNR at fIN] |
| SFDR (typical) | — | [DATA_NEEDED: SFDR at fIN] |
| Internal Reference | — | Yes |
| Sample-and-Hold Input | — | Integrated |