EP1810LC-45 vs EP1810LC-35 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP1810LC-45 sa pamamagitan ng Rochester Electronics at EP1810LC-35 sa pamamagitan ng Rochester Electronics. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Rochester Electronics
EP1810LC-45 - 900-Gate Classic EPLD, 48 Macro Cells, PLCC-68 | Intel
EP1810LC-45 ObsoleteRochester Electronics
EP1810LC-35 - 48-Macrocell Classic EPLD, 35ns, PLCC-68 | Rochester/Altera
EP1810LC-35 ⚠ Huling PagbiliPagsanggunian na paghahambing
| Parametro | EP1810LC-45 | EP1810LC-35 |
|---|---|---|
| Brand | Rochester Electronics | Rochester Electronics |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Huling Pagbili |
| Family | Altera Classic EPLD | — |
| Device Type | EPLD (Erasable Programmable Logic Device) | EPLD (Erasable Programmable Logic Device) |
| Usable Gates | 900 | — |
| Macro Cells | 48 | — |
| Maximum Inputs | 64 | — |
| Maximum Outputs | 48 | — |
| Logic Array Blocks | 4 | — |
| Propagation Delay (tpd) | 45 ns | 35 ns (max, '-35' speed grade) |
| Maximum Operating Frequency | 22.2 MHz | 28.6 MHz |
| Supply Voltage (Vcc) | 5 V (±5%) | — |
| Process Technology | 5 V CMOS EPROM | — |
| Packhaging | 68-pin PLCC (J-lead) | 68-pin PLCC (J-Lead) |
| Temperature na Operasyon | 0 °C to +70 °C (commercial) | 0C to +70C (commercial) |
| Uri ng Pagpapasok | Surface Mount (PLCC socket compatible) | Surface Mount (socketable) |
| Tindminan RoHS | [DATA_NEEDED: RoHS status of Rochester-sourced part] | [DATA_NEEDED] |
| Lead-Free | [DATA_NEEDED: lead-free finish] | [DATA_NEEDED] |
| Series | — | Classic EP1810 |
| Macrocells | — | 48 |
| Equivalent Gates | — | 900 usable / 2100 equivalent |
| Supply Voltage (VCC) | — | 5 V (4.75 V to 5.25 V) |
| Technology | — | CMOS, UV-erasable EPROM |
| I/O Pins | — | [DATA_NEEDED: I/O count exact] |
| Configuration Method | — | UV-erase + EPROM programmer |
| Programmable Interconnect | — | Centralized Programmable Interconnect Array (PIA) |
| Development Tool (legacy) | — | MAX+PLUS II / A+PLUS |