EP1AGX50DF780C7 vs EP1AGX50DF780I7 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP1AGX50DF780C7 sa pamamagitan ng Altera at EP1AGX50DF780I7 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP1AGX50DF780C7 | EP1AGX50DF780I7 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | NRND |
| Family | Arria GX | Arria GX |
| Logic Elements | 50,160 | — |
| Memory Bits | 2,475,072 bits | — |
| Embedded 18x18 Multipliers | 232 | — |
| Transceiver Count | Up to 8 channels | — |
| Max Transceiver Data Rate | 3.125 Gbps | 3.125 Gbps |
| Process Technology | 90 nm CMOS | 90 nm CMOS |
| Core Voltage | 1.2 V | — |
| Packhaging | 780-ball FineLine BGA (DF780) | 780-BBGA, FineLine BGA, 1.0 mm pitch |
| I/O Pins | [DATA_NEEDED: I/O pin count] | — |
| User I/O Banks | [DATA_NEEDED: bank count] | — |
| Speed Grade | C7 (commercial, speed grade 7) | I7 (industrial, slowest) |
| Temperature na Operasyon | 0C to +85C (commercial) | — |
| Configuration Modes | Passive Serial (PS), Active Serial (AS), JTAG | JTAG, Passive Serial (PS), Fast Passive Parallel (FPP) |
| Memory Interfaces | DDR2 SDRAM, QDRII SRAM, RLDRAM II | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: rohs status] |
| Series | — | EP1AGX |
| Logic Elements (LE) | — | 50,160 |
| Embedded Memory Bits | — | 2,475,072 |
| Embedded Multipliers (18x18) | — | 232 |
| User I/O Pins | — | 350 |
| Transceiver Channels | — | 12 |
| Hanay ng Temperature na Operasyon | — | -40C to +100C (industrial) |
| On-die PLLs | — | 8 |
| Supply Voltage Core | — | 1.2 V |
| Uri ng Pagpapasok | — | Surface Mount (BGA) |