EP1C20F324C7N vs EP1C12F324C7N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP1C20F324C7N sa pamamagitan ng Intel at EP1C12F324C7N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP1C20F324C7N | EP1C12F324C7N |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Huling Pagbili | Obsolete |
| Series | Cyclone | Cyclone |
| Logic Elements (LEs) | 20060 | 12,060 |
| Logic Array Blocks (LABs) | 2006 | 1,206 |
| Total RAM Bits | 294912 | — |
| Maximum User I/O | 233 | 249 |
| Number of I/O Banks | [DATA_NEEDED: number of I/O banks] | — |
| Packhaging | 324-BGA (FBGA-324, 19 x 19 mm, 1.0 mm pitch) | — |
| Speed Grade | C7 (commercial) | C7 (commercial, -40C to 85C; spec datasheet: 0C to 85C) |
| Lead-Free Status | Yes (N suffix = Pb-free) | — |
| Uri ng Pagpapasok | Surface Mount (BGA) | Surface Mount |
| Process Technology | 0.13 um CMOS, SRAM-based | 130 nm CMOS |
| Core Voltage | 1.5 V | 1.5 V |
| Temperature na Operasyon | Commercial (0C to +85C) | [DATA_NEEDED: precise commercial temperature range per datasheet] |
| Uri ng Memory | M4K embedded SRAM blocks | — |
| PLLs | [DATA_NEEDED: PLL count] | — |
| Multipliers (DSP blocks) | [DATA_NEEDED: multiplier count] | — |
| Configuration Scheme | SRAM-based, external flash | — |
| Soft-core Support | Nios II embedded processor | — |
| Tindminan RoHS | Compliant | Compliant (N suffix = lead-free) |
| Katayuan ng Lifecycle | Last Time Buy (Cyclone I family EOL announced by Intel/Altera) | — |
| Family | — | Cyclone I |
| Manufacturer | — | Intel (formerly Altera) |
| Embedded Memory (bits) | — | 239,616 |
| Number of PLLs | — | 2 |
| Supply Voltage na Operasyon | — | 1.5 V to 3.3 V |
| Maximum Internal Frequency | — | 320 MHz |
| Packhaging / Kaso | — | 324-BGA (FBGA-324, 19 x 19 mm, 1.0 mm pitch) |
| Configuration Method | — | AS / PS / JTAG |