EP1C6F256C8N vs EP1C6F256C2 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP1C6F256C8N sa pamamagitan ng Intel at EP1C6F256C2 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP1C6F256C8N | EP1C6F256C2 |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Huling Pagbili | Obsolete |
| Series | Cyclone | — |
| Family | Cyclone I | Cyclone (original, 1st generation) |
| Logic Elements (LEs) | 5,980 | 5,980 |
| Embedded Memory (bits) | 92,160 | — |
| User I/O Pins | 185 | — |
| Number of PLLs | 2 | — |
| Core Voltage (VCCINT) | 1.5 V | 1.5 V |
| Temperature na Operasyon | 0 °C to +85 °C (Commercial) | -40 °C to +85 °C (commercial) |
| Speed Grade | 8 | C2 (commercial, -40 °C to +85 °C) |
| Packhaging | 256-BGA (FBGA-256), 17 × 17 mm, 1.0 mm pitch | 256-ball FineLine BGA (F256), 17 × 17 mm, 1.0 mm pitch |
| Uri ng Pagpapasok | Surface Mount | Surface Mount (BGA) |
| Process Node | 0.13 µm SRAM | — |
| Configuration Modes | Passive Serial (PS), Active Serial (AS), JTAG | Passive Serial (PS), JTAG |
| I/O Standards Supported | LVTTL, LVCMOS, SSTL, LVDS | — |
| Tindminan RoHS | Compliant | — |
| Level ng MSL | 3 | — |
| Total RAM Bits | — | 92,160 bits |
| Embedded Memory Blocks | — | 20 M4K blocks (4 Kbit each) |
| PLLs | — | 2 |
| Maximum User I/O | — | 185 |
| I/O Voltage (VCCIO) | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V (per bank) |
| Process Technology | — | 0.13 µm SRAM |
| Lead-Free / RoHS | — | Compliant (per current distributor listings) |
| Design Software | — | Altera Quartus II (legacy) / Quartus Prime |