EP1C6T144C8N vs EP1C6T144I-7 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP1C6T144C8N sa pamamagitan ng Intel at EP1C6T144I-7 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP1C6T144C8N | EP1C6T144I-7 |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Obsolete |
| Series | Cyclone® | — |
| Family | Cyclone I | Cyclone |
| Logic Elements (LE) | 5,980 | — |
| Logic Array Blocks (LAB) | 598 | — |
| Total RAM Bits | 92,160 | — |
| User I/O Pins | 98 | — |
| Number of I/O Banks | 4 | — |
| PLLs | 2 | — |
| Maximum Internal Frequency | 275 MHz | 320.1 MHz (speed grade -7) |
| Speed Grade | C8 (commercial) | -7 |
| Core Voltage (VCCINT) | 1.425 V to 1.575 V (typ. 1.5 V) | — |
| Process Technology | 0.13 µm all-layer copper SRAM | 130 nm CMOS |
| Packhaging | 144-pin TQFP | 144-pin LQFP (TQFP), 0.5 mm pitch |
| Uri ng Pagpapasok | Surface Mount | — |
| Temperature na Operasyon | 0°C to +85°C (commercial) | -40 °C to +100 °C (industrial) |
| Configuration Method | Active Serial (EPCS), Passive Serial, JTAG | — |
| Level ng MSL | 3 (per JEDEC J-STD-020) | — |
| Tindminan RoHS | Compliant | Non-compliant (contains lead) |
| Logic Elements (LEs) | — | 5,980 |
| Embedded RAM Bits | — | 92,160 bits |
| Embedded RAM Blocks | — | 20 M4K blocks (4,608 bits each) |
| Maximum User I/O | — | 98 |
| Number of PLLs | — | 2 |
| Core Supply Voltage (VCCINT) | — | 1.5 V |
| Configuration Modes | — | Passive Serial, Active Serial, JTAG |
| JTAG Support | — | Yes (IEEE 1149.1 boundary-scan) |
| Tray Quantity | — | 180 units per tray |
| Radiation Hardened | — | No |