EP1C6T144I7N vs EP1C6T144I-7 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP1C6T144I7N sa pamamagitan ng Intel at EP1C6T144I-7 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP1C6T144I7N | EP1C6T144I-7 |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Series | Cyclone | — |
| Family | Cyclone (1st generation) | Cyclone |
| Logic Elements | 5,980 | — |
| Logic Array Blocks (LABs) | 598 | — |
| Total RAM Bits | 92,160 | — |
| Embedded RAM Blocks | 20 x M4K (4 Kbit each) | 20 M4K blocks (4,608 bits each) |
| PLLs | 2 | — |
| User I/O Pins | 98 | — |
| I/O Banks | 4 | — |
| Core Voltage | 1.5 V | — |
| I/O Voltage | 1.5 V to 3.3 V | — |
| Maximum LVDS Pairs | 64 | — |
| Packhaging | 144-LQFP (TQFP-144) | 144-pin LQFP (TQFP), 0.5 mm pitch |
| Temperature na Operasyon | -40 °C to +100 °C | -40 °C to +100 °C (industrial) |
| Speed Grade | I7 (industrial, slowest) | -7 |
| Uri ng Pagpapasok | Surface Mount | — |
| Process Technology | 0.13 μm SRAM | 130 nm CMOS |
| Configuration Modes | AS, PS, JTAG | Passive Serial, Active Serial, JTAG |
| Tindminan RoHS | Compliant | Non-compliant (contains lead) |
| Level ng MSL | 3 (168 hours) | — |
| Logic Elements (LEs) | — | 5,980 |
| Embedded RAM Bits | — | 92,160 bits |
| Maximum User I/O | — | 98 |
| Number of PLLs | — | 2 |
| Maximum Internal Frequency | — | 320.1 MHz (speed grade -7) |
| Core Supply Voltage (VCCINT) | — | 1.5 V |
| JTAG Support | — | Yes (IEEE 1149.1 boundary-scan) |
| Tray Quantity | — | 180 units per tray |
| Radiation Hardened | — | No |