EP1K100FC256-1 vs EP1K100FC256-1N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP1K100FC256-1 sa pamamagitan ng Altera at EP1K100FC256-1N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EP1K100FC256-1N - 100K Gates 49Kbit SRAM ACEX-1K FPGA | Altera | BGA-256
EP1K100FC256-1N ObsoletePagsanggunian na paghahambing
| Parametro | EP1K100FC256-1 | EP1K100FC256-1N |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | ACEX 1K | ACEX-1K |
| Logic Elements | 4,992 | 4,992 |
| Typical Gates | 100,000 | 100,000 |
| Embedded RAM (bits) | 49,152 | — |
| Embedded RAM blocks (EABs) | 12 | — |
| Maximum User I/O | 186 | 186 |
| Speed Grade | -1 | -1 |
| Core Voltage | 2.5 V | 2.5 V |
| Process Technology | 0.22 µm CMOS | 0.18 µm SRAM-based |
| Packhaging | 256-BGA (FineLine) | 256-ball FineLine BGA |
| Temperature na Operasyon | 0C to +70C (commercial) | — |
| Maximum Internal Frequency | 333.33 MHz | — |
| I/O Standards Supported | LVTTL, LVCMOS, PCI, SSTL-2/3 | LVTTL, LVCMOS, PCI, SSTL (1.5 V / 1.8 V / 2.5 V / 3.3 V) |
| Configuration Interface | JTAG (IEEE 1149.1) + serial EEPROM | — |
| Uri ng Pagpapasok | Surface Mount (BGA) | — |
| Embedded SRAM | — | 49,152 bits |
| Logic Array Blocks (LABs) | — | 624 |
| Embedded Array Blocks (EABs) | — | 12 |
| Operating Temperature (Commercial) | — | 0 °C to +70 °C |
| Configuration Mode | — | Passive Serial / Passive Parallel (Synchronous & Asynchronous) |
| JTAG Support | — | IEEE 1149.1 Boundary-Scan |
| Lead-Free (N suffix) | — | Yes (Pb-free BGA) |