EP1K100FC256-3 vs EP1K100FI256-3 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP1K100FC256-3 sa pamamagitan ng Intel at EP1K100FI256-3 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EP1K100FI256-3 - 100K-Gate ACEX 1K FPGA, 186 I/O, FBGA-256 | Intel
EP1K100FI256-3 ⚠ Huling PagbiliPagsanggunian na paghahambing
| Parametro | EP1K100FC256-3 | EP1K100FI256-3 |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Huling Pagbili |
| Family | ACEX-1K | ACEX 1K |
| Logic Elements | 4,992 | — |
| Typical Gates | 100,000 | — |
| Embedded Memory (EAB RAM) | 49,152 bits | — |
| Number of LABs/CLBs | 624 | — |
| User I/O Count | 186 | — |
| Core Voltage (VCCINT) | 2.5 V | — |
| I/O Voltage (VCCIO) | [DATA_NEEDED: VCCIO voltage range] | — |
| Process Technology | 0.22 µm CMOS | 0.22 micron CMOS |
| Speed Grade | -3 | -3 |
| Packhaging | 256-ball FineLine BGA (FBGA-256) | 256-ball FineLine BGA (FBGA-256) |
| Package Outline | [DATA_NEEDED: package dimensions mm] | — |
| Temperature na Operasyon | Commercial (0°C to +70°C) | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Level ng MSL | [DATA_NEEDED: MSL rating] | [DATA_NEEDED: MSL level] |
| Tindminan RoHS | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS status] |
| Lead-Free | [DATA_NEEDED: lead-free status] | [DATA_NEEDED: lead-free status] |
| JTAG / Boundary Scan | IEEE 1149.1 compliant | — |
| Device Logic Elements | — | 4,992 |
| Typical Gate Count | — | 100,000 gates |
| Maximum RAM Bits | — | 49,152 bits |
| User I/O Pins | — | 186 |
| Dedicated Inputs | — | 6 |
| Nominal Core Voltage | — | 2.5 V |
| Core Voltage Range | — | 2.375 V to 2.625 V |
| Hanay ng Temperature na Operasyon | — | -40 C to +85 C (Industrial) |
| Configuration Method | — | SRAM-based, JTAG / PS / AS supported |
| AEC-Q100 Qualification | — | Not qualified |
| JTAG Boundary Scan | — | Yes (IEEE 1149.1) |