EP1K100FC484-2N vs EP1K100FC484-1 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP1K100FC484-2N sa pamamagitan ng Intel at EP1K100FC484-1 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EP1K100FC484-2N - 100K Gates ACEX-1K FPGA 333 I/O 484-FBGA | Intel
EP1K100FC484-2N ⚠ Huling PagbiliIntel
EP1K100FC484-1 - 100K Gate ACEX-1K FPGA, 484-BGA, 333MHz | Intel / Altera
EP1K100FC484-1 ObsoletePagsanggunian na paghahambing
| Parametro | EP1K100FC484-2N | EP1K100FC484-1 |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Huling Pagbili | Obsolete |
| Family | ACEX-1K | ACEX-1K |
| Logic Elements | 4,992 | — |
| Typical Gates | 100,000 | — |
| Embedded Memory (EAB) | 49,152 bits | — |
| Maximum User I/O | 333 | — |
| Packhaging | 484-ball FBGA | 484-ball FBGA (FC484), 23 x 23 mm |
| Core Voltage | 2.5 V | — |
| Process Technology | 0.22 µm SRAM | 0.22 µm CMOS |
| Speed Grade | -2 (commercial) | -1 (commercial) |
| Temperature na Operasyon | [DATA_NEEDED: operating temperature range] | 0°C to +70°C (commercial) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount (BGA) |
| Configuration Method | SRAM, JTAG (IEEE 1149.1) | — |
| Programmable I/O Standards | LVTTL, LVCMOS, PCI, SSTL-2/3, GTL+ | — |
| Tindminan RoHS | [DATA_NEEDED: non-leaded vs leaded suffix; -2N suffix indicates non-leaded per Altera naming] | Non-compliant (original SnPb ball version) |
| Lead Status | Contains lead (legacy non-Pb-free suffix -2N) | — |
| Logic Elements (LEs) | — | 4,992 |
| Equivalent Gates | — | 100,000 |
| Embedded Memory (Bits) | — | 49,152 |
| Embedded Array Blocks (EABs) | — | 6 |
| Logic Array Blocks (LABs) | — | 624 |
| Maximum User I/O Pins | — | 333 |
| Maximum Operating Frequency | — | 333.33 MHz |
| Core Supply Voltage (VCCINT) | — | 2.5 V |
| I/O Supply Voltage (VCCIO) | — | 2.5 V to 3.3 V |
| Programming Interface | — | IEEE 1149.1 JTAG, serial Passive Serial |