EP1K10QC208-2 vs EP1K10QC208-3 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP1K10QC208-2 sa pamamagitan ng Intel at EP1K10QC208-3 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EP1K10QC208-2 - ACEX-1K FPGA, 10K Gates, 576 Logic Elements, 208-PQFP | Intel (Altera)
EP1K10QC208-2 Obsolete
Pagsanggunian na paghahambing
| Parametro | EP1K10QC208-2 | EP1K10QC208-3 |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | NRND |
| Family | ACEX-1K | ACEX-1K |
| Logic Elements | 576 | — |
| Configurable Logic Blocks (CLBs) | 72 | — |
| Equivalent Gates | 10,000 | — |
| Embedded RAM Bits | 12,288 | — |
| Embedded Array Blocks (EABs) | 3 (per datasheet, 4096-bit each) | — |
| Maximum User I/O | 120 | — |
| Supply Voltage (Core) | 2.5 V | — |
| Speed Grade | -2 | -3 |
| Packhaging | 208-pin BQFP (PQFP, gull-wing) | 208-pin PQFP (BFQFP) |
| Temperature na Operasyon | Commercial (0C to +70C) | Commercial (0C to +70C) |
| Configuration Method | SRAM, serial | — |
| Process Technology | 2.5 V CMOS | 0.22 µm SRAM CMOS |
| JTAG Support | IEEE 1149.1 boundary-scan | — |
| Lead-Free / RoHS | Non-compliant (legacy Altera part) | — |
| Typical Gate Count | — | 10,000 gates |
| Logic Elements (LEs) | — | 576 |
| Embedded System Blocks (EABs) | — | 3 (each 4 Kbit, dual-port capable) |
| Total RAM Bits | — | 12,288 bits |
| Logic Array Blocks (LABs) | — | 72 |
| Maximum User I/O Pins | — | 120 |
| Supply Voltage - Core | — | 2.5 V |
| Supply Voltage - I/O | — | 3.3 V (multi-standard I/O) |
| Uri ng Pagpapasok | — | Surface Mount |
| Level ng MSL | — | 3 (per JEDEC J-STD-020) |
| Tindminan RoHS | — | Compliant |