EP1K10QC208-3 vs EP1K10QC208-3N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP1K10QC208-3 sa pamamagitan ng Altera at EP1K10QC208-3N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP1K10QC208-3 | EP1K10QC208-3N |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Obsolete |
| Family | ACEX-1K | ACEX 1K |
| Typical Gate Count | 10,000 gates | — |
| Logic Elements (LEs) | 576 | 576 |
| Embedded System Blocks (EABs) | 3 (each 4 Kbit, dual-port capable) | — |
| Total RAM Bits | 12,288 bits | — |
| Logic Array Blocks (LABs) | 72 | 72 |
| Maximum User I/O Pins | 120 | — |
| Supply Voltage - Core | 2.5 V | — |
| Supply Voltage - I/O | 3.3 V (multi-standard I/O) | — |
| Speed Grade | -3 | -3 |
| Packhaging | 208-pin PQFP (BFQFP) | 208-BQFP (PQFP-208) |
| Process Technology | 0.22 µm SRAM CMOS | 0.22 µm CMOS |
| Temperature na Operasyon | Commercial (0C to +70C) | 0°C to +70°C (commercial) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Level ng MSL | 3 (per JEDEC J-STD-020) | — |
| Tindminan RoHS | Compliant | [DATA_NEEDED: RoHS status] |
| Series | — | ACEX-1K |
| Typical Gates | — | 10,000 |
| Embedded RAM Bits | — | 12,288 |
| User I/O Pins | — | 120 |
| Core Voltage | — | 2.5 V |
| Maximum Internal Frequency | — | 200 MHz |
| Configuration Method | — | Passive Serial / JTAG (IEEE 1149.1) |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |