EP1K10TC100-3N vs EP1K10TI100-2N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP1K10TC100-3N sa pamamagitan ng Intel at EP1K10TI100-2N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EP1K10TC100-3N - 10K-Gate ACEX-1K FPGA, 576 Cells, 66 I/O, 100-TQFP | Intel / Altera
EP1K10TC100-3N ObsoletePagsanggunian na paghahambing
| Parametro | EP1K10TC100-3N | EP1K10TI100-2N |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Series | ACEX-1K | — |
| Family | ACEX 1K | ACEX-1K |
| Manufacturer | Intel (formerly Altera) | — |
| Typical Gate Count | 10,000 gates | — |
| Logic Elements (Cells) | 576 | — |
| Embedded Memory (EAB) | 12,288 bits | — |
| Number of LABs | 72 | — |
| User I/O Count | 66 | — |
| Operating Voltage (Core) | 2.5 V | — |
| Process Technology | 0.22 µm CMOS | — |
| Maximum Internal Clock Frequency | 200 MHz | — |
| Speed Grade | -3 (commercial) | -2 |
| Packhaging | 100-pin TQFP | — |
| JTAG Support | Yes (IEEE 1149.1-1990) | — |
| PCI Compliance | PCI Local Bus Specification Revision 2.2 (5.0 V) | — |
| Configuration | JTAG / serial configuration device | — |
| Temperature na Operasyon | [DATA_NEEDED: operating temperature range] | -40C to +85C (Industrial) |
| Tindminan RoHS | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: rohs compliance] |
| Logic Elements / Cells | — | 576 |
| Number of LABs/CLBs | — | 72 |
| Total RAM Bits | — | 12288 |
| Number of I/O | — | 66 |
| Number of Gates | — | 10,000 typical |
| Voltage - Supply | — | 2.5 V core |
| Uri ng Pagpapasok | — | Surface Mount |
| Packhaging / Kaso | — | 100-TQFP (LFQFP, gull-wing) |
| Technology | — | 0.22 um CMOS |
| Lead Status | — | Lead Free / Pb-Free (N suffix) |
| Maximum Frequency | — | 200 MHz |