EP1K10TC1443N vs EP1K10TC144-2N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP1K10TC1443N sa pamamagitan ng Altera at EP1K10TC144-2N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EP1K10TC144-2N - 10K Gate ACEX-1K FPGA, 92 I/O, TQFP-144 | Intel / Altera
EP1K10TC144-2N ObsoletePagsanggunian na paghahambing
| Parametro | EP1K10TC1443N | EP1K10TC144-2N |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | ACEX 1K | ACEX-1K |
| Typical Gates | 10,000 | 10,000 |
| Logic Elements | 576 | 576 |
| Logic Array Blocks (LABs) | 72 | 72 |
| Embedded Memory (EAB bits) | 12,288 | — |
| User I/Os | 92 | — |
| Maximum User I/O Pins | 144 | — |
| Packhaging | TQFP-144 (TQ144) | TQFP-144 (TC) 22x22 mm, 0.5 mm pitch |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Core Voltage | 2.5 V | 2.5 V |
| Speed Grade | -3 | -2 |
| Maximum Frequency | 80 MHz | — |
| Process Technology | 2.5 V CMOS | — |
| Configuration Memory | SRAM-based | — |
| JTAG Boundary-Scan | IEEE Std. 1149.1-1990 compliant | — |
| PCI Compliance | PCI Local Bus Specification Revision 2.2 (5.0 V) | — |
| Embedded RAM Type | Dual-port | — |
| Temperature na Operasyon | Commercial (0C to +70C) - [DATA_NEEDED: full T range for -3N suffix] | 0 C to +70 C (commercial) |
| Tindminan RoHS | [DATA_NEEDED: lead-free/RoHS status] | [DATA_NEEDED: rohs status] |
| Embedded RAM Bits | — | 12,288 |
| Embedded Array Blocks (EABs) | — | 12 |
| User I/O Pins | — | 92 |
| Configuration Method | — | Serial / JTAG |
| JTAG Support | — | IEEE 1149.1 boundary scan |