EP1K10TI100-2N vs EP1K10TC100-2N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP1K10TI100-2N sa pamamagitan ng Altera at EP1K10TC100-2N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP1K10TI100-2N | EP1K10TC100-2N |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Huling Pagbili |
| Family | ACEX-1K | ACEX-1K |
| Logic Elements / Cells | 576 | 576 |
| Number of LABs/CLBs | 72 | — |
| Total RAM Bits | 12288 | — |
| Number of I/O | 66 | — |
| Number of Gates | 10,000 typical | — |
| Voltage - Supply | 2.5 V core | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Temperature na Operasyon | -40C to +85C (Industrial) | 0 C to +70 C (commercial) |
| Packhaging / Kaso | 100-TQFP (LFQFP, gull-wing) | — |
| Technology | 0.22 um CMOS | — |
| Speed Grade | -2 | -2 |
| Lead Status | Lead Free / Pb-Free (N suffix) | — |
| Tindminan RoHS | [DATA_NEEDED: rohs compliance] | Lead-free / RoHS compliant |
| Maximum Frequency | 200 MHz | 200 MHz |
| Typical Gates | — | 10,000 |
| Logic Array Blocks (LABs) | — | 72 |
| Embedded Memory (EAB) | — | 12,288 bits |
| Maximum User I/O | — | 66 |
| Process Technology | — | 0.22 um CMOS |
| Core Voltage (VCCINT) | — | 2.5 V |
| I/O Voltage (VCCIO) | — | 1.8 V / 2.5 V / 3.3 V / 5 V |
| Packhaging | — | 100-pin TQFP (1.0 mm body, 0.5 mm pitch) |
| Configuration Modes | — | Passive Serial, Active Serial, JTAG |