EP1K30QC208-3 vs EP1K30QI208-3N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP1K30QC208-3 sa pamamagitan ng Intel at EP1K30QI208-3N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EP1K30QI208-3N - 30K Gate ACEX 1K FPGA, 147 I/O, 208-PQFP | Intel (Altera)
EP1K30QI208-3N ObsoletePagsanggunian na paghahambing
| Parametro | EP1K30QC208-3 | EP1K30QI208-3N |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Huling Pagbili | Obsolete |
| Family | ACEX-1K | ACEX-1K |
| Logic Elements | 1,728 | — |
| Typical Gates | 30,000 | — |
| Maximum System Gates | 119,000 | — |
| Embedded Array Blocks (EABs) | 6 | — |
| Total RAM Bits | 24,576 | 24576 |
| Maximum User I/O | 147 | — |
| Core Voltage | 2.5 V | — |
| Speed Grade | -3 | -3 |
| Packhaging | 208-pin PQFP (Plastic Quad Flat Pack) | 208-pin PQFP / FQFP (S-PQFP-G208), 0.5 mm pitch |
| Temperature na Operasyon | 0C to +70C (commercial) | -40 C to +85 C (industrial) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount (fine-pitch QFP) |
| Process Technology | SRAM-based LUT, 0.18 um | — |
| I/O Standards Supported | LVTTL, LVCMOS, PCI | — |
| Programming Interface | IEEE 1149.1 JTAG, ByteBlaster | JTAG (IEEE 1149.1) + serial configuration |
| Tindminan RoHS | [DATA_NEEDED: RoHS compliance status] | Compliant |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Series | — | ACEX 1K |
| Logic Elements / Cells | — | 1728 |
| Number of I/O | — | 147 |
| Number of Dedicated Inputs | — | 6 |
| Number of Gates (typical) | — | 30000 |
| Number of Embedded Array Blocks | — | 6 |
| Core Supply Voltage | — | 2.375 V to 2.625 V (nominal 2.5 V) |
| I/O Standards | — | LVTTL, LVCMOS (multi-voltage I/O) |
| Configuration Memory | — | Volatile SRAM (serial configuration required) |