EP1K30TC144-1 vs EP1K30TC144-3 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP1K30TC144-1 sa pamamagitan ng Altera at EP1K30TC144-3 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP1K30TC144-1 | EP1K30TC144-3 |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Obsolete |
| Series | ACEX-1K | ACEX-1K |
| Family | ACEX 1K | — |
| Equivalent Gates | 30,000 | — |
| Number of Logic Elements / Cells | 1,728 | — |
| Number of LABs / CLBs | 216 | — |
| Total RAM Bits | 24,576 | 24,576 |
| Number of I/O | 102 | — |
| Packhaging | 144-LQFP (TQFP) | 144-LQFP / 144-TQFP (22x22 mm, 0.5 mm pitch) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Core Supply Voltage | 2.5 V | — |
| Technology | CMOS, SRAM-based | — |
| Speed Grade | -1 (slowest in ACEX-1K family) | -3 (slowest speed bin) |
| Temperature na Operasyon | 0C to +70C (commercial) | — |
| Configuration Method | SRAM, in-system programmable | Serial configuration device (EPC2/EPC8 compatible) |
| Tindminan RoHS | [DATA_NEEDED: RoHS status not in verified data] | [DATA_NEEDED: rohs status from datasheet] |
| Logic Elements / Cells | — | 1,728 |
| Number of LABs/CLBs | — | 216 |
| Typical Gates | — | 30,000 |
| Maximum System Gates | — | 56,000 |
| Number of User I/O | — | 102 |
| Number of Logic Array Blocks | — | 216 |
| Supply Voltage (Core) | — | 2.5 V |
| I/O Voltage Standard | — | 2.5 V LVCMOS / LVTTL (MultiVolt up to 5.0 V tolerant) |
| Process Technology | — | 0.22 µm SRAM |
| Operating Temperature (Commercial) | — | 0C to +70C |
| Boundary Scan | — | IEEE 1149.1 JTAG compliant |
| Number of Global Clocks | — | 8 |