EP1M120B484C5 vs EP1M120F484C5 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP1M120B484C5 sa pamamagitan ng Intel at EP1M120F484C5 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP1M120B484C5 | EP1M120F484C5 |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | NRND |
| Family | Mercury (EP1M) | Mercury Device Family |
| Logic Elements | 4,800 | — |
| Typical Gates | 120,000 | — |
| Maximum User I/O | 303 | — |
| Packhaging | FineLine BGA-484 (19 mm x 19 mm, 1.0 mm pitch) | 484-ball FineLine BGA (FBGA-484) |
| Temperature na Operasyon | 0C to +85C (commercial) | 0 C to +85 C (Commercial) |
| Speed Grade | 5 (slowest) | -5 |
| Core Voltage | 1.8 V | — |
| Process Technology | 0.18 um CMOS | — |
| PLLs | 4 | — |
| Embedded RAM Bits | 49,152 | — |
| True LVDS Channels | Up to 34 pairs | — |
| Maximum LVDS Data Rate | 840 Mbps per channel | — |
| Configuration Scheme | Passive serial, passive parallel synchronous, passive parallel asynchronous, JTAG | — |
| Peak Reflow Temperature | 220 C | — |
| Lead-Free / RoHS | SnPb ball finish (non-RoHS by default) | — |
| Multipliers | Embedded in system blocks for DSP | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Device Type | — | FPGA (Field Programmable Gate Array) |
| Logic Array Blocks (LABs) | — | 480 |
| User I/O Count | — | 303 |
| Core Supply Voltage | — | 1.8 V |
| Transceiver Data Rate | — | 1.25 Gbps (CDR-capable) |
| Grade Suffix | — | C (Commercial, 0 C to +85 C) |
| Architecture | — | LUT-based, optimized for high performance |
| Tindminan RoHS | — | [DATA_NEEDED: rohs_status] |
| REACH Status | — | [DATA_NEEDED: reach_status] |
| Lead-Free | — | [DATA_NEEDED: lead_free] |
| Wala sa Halogen | — | [DATA_NEEDED: halogen_free] |