EP1M120B484C6 vs EP1M120B484C5 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP1M120B484C6 sa pamamagitan ng Intel at EP1M120B484C5 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP1M120B484C6 | EP1M120B484C5 |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | NRND |
| Family | Mercury (ACEX 1M) | Mercury (EP1M) |
| Logic Elements (typical) | 120 LE | — |
| Maximum Logic Elements | [DATA_NEEDED: maximum logic elements] | — |
| Flip-Flops | 4,800 | — |
| User I/O Pins (max) | 303 | — |
| Configuration Memory | SRAM-based (volatile, re-load on power-up) | — |
| Packhaging | 484-ball FineLine BGA (BGA-484) | FineLine BGA-484 (19 mm x 19 mm, 1.0 mm pitch) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Peak Reflow Temperature | 220 °C | 220 C |
| Operating Temperature Grade | Commercial (C suffix) | — |
| Process Node | 0.18 µm | — |
| JTAG Support | IEEE 1149.1 boundary-scan | — |
| Configuration Modes | PS, AS, JTAG | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | — |
| Design Software | Quartus II (legacy support required) | — |
| Logic Elements | — | 4,800 |
| Typical Gates | — | 120,000 |
| Maximum User I/O | — | 303 |
| Temperature na Operasyon | — | 0C to +85C (commercial) |
| Speed Grade | — | 5 (slowest) |
| Core Voltage | — | 1.8 V |
| Process Technology | — | 0.18 um CMOS |
| PLLs | — | 4 |
| Embedded RAM Bits | — | 49,152 |
| True LVDS Channels | — | Up to 34 pairs |
| Maximum LVDS Data Rate | — | 840 Mbps per channel |
| Configuration Scheme | — | Passive serial, passive parallel synchronous, passive parallel asynchronous, JTAG |
| Lead-Free / RoHS | — | SnPb ball finish (non-RoHS by default) |
| Multipliers | — | Embedded in system blocks for DSP |