EP1M120F484C6N vs EP1M120F484C7A Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP1M120F484C6N sa pamamagitan ng Intel at EP1M120F484C7A sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP1M120F484C6N | EP1M120F484C7A |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Huling Pagbili |
| Family | Mercury (APEX PLD platform) | Mercury FPGA |
| Typical Gates | 120,000 | — |
| Logic Cells / Elements | 4,800 | — |
| Logic Array Blocks (LABs) | 480 | — |
| User I/Os | 303 | 303 |
| Packhaging | 484-ball FC-FBGA (FineLine BGA) | 484-pin FineLine BGA (FC-FBGA) |
| Core Supply Voltage (VCCINT) | 1.71 V to 1.89 V (1.8 V nominal) | — |
| Transceiver Data Rate | Up to 1.25 Gbps with CDR | Up to 1.25 Gbps with CDR |
| Temperature na Operasyon | 0C to 85C (commercial) | 0 C to 85 C (commercial) |
| Process Technology | CMOS | — |
| Architecture | LUT-based, optimized for high-speed interconnect | — |
| MultiCore Support | Yes (hot socketing) | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount (BGA) |
| Level ng MSL | 3 (per JEDEC J-STD-020) | — |
| Tindminan RoHS | Compliant | [DATA_NEEDED: RoHS status] |
| Logic Family | — | CMOS |
| Equivalent System Gates | — | 120,000 |
| Logic Cells | — | 4,800 |
| Total Pins | — | 484 |
| Core Supply Voltage | — | 1.8 V |
| Programmable Logic Type | — | Loadable PLD |
| Terminal Form | — | Ball |
| Package Shape | — | Square |
| Configuration Interface | — | [DATA_NEEDED: configuration interface type] |