EP1M120F484C7 vs EP1M120F484C6ES Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP1M120F484C7 sa pamamagitan ng Altera at EP1M120F484C6ES sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP1M120F484C7 | EP1M120F484C6ES |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | Mercury (EP1M) | Mercury (Altera / Intel) |
| Logic Family | CMOS | — |
| Logic Elements | 49,152 | — |
| Number of LABs | 480 | — |
| User I/Os | 303 | — |
| Bilang ng Pins | 484 | — |
| Package Type | FineLine BGA (FBGA-484) | — |
| Core Supply Voltage | 1.8 V | 1.8 V |
| Temperature na Operasyon | 0 C to 85 C (Commercial) | [DATA_NEEDED: commercial / industrial / military grade] |
| High-Speed Transceivers | Integrated, CDR up to 1.25 Gbps | — |
| Configuration | JTAG / Active Serial (per datasheet) | — |
| Device Type | Loadable PLD (FPGA) | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: per specific lot] |
| Level ng MSL | [DATA_NEEDED: MSL level] | — |
| Country of Origin | [DATA_NEEDED: COO] | — |
| System Gates | — | 120,000 |
| Logic Elements / Cells | — | 4,800 |
| Logic Array Blocks (LABs) | — | 480 |
| Embedded Memory (bits) | — | 49,152 |
| Maximum User I/O | — | 303 |
| I/O Standards Supported | — | LVTTL, LVCMOS (1.5/1.8/2.5/3.3 V) |
| Configuration Technology | — | SRAM (volatile) |
| Packhaging | — | 484-ball FC-FBGA |
| Uri ng Pagpapasok | — | Surface Mount (BGA) |
| Speed Grade | — | 6 (-6) |
| JTAG / Boundary Scan | — | Yes (IEEE 1149.1) |
| Part Status | — | Obsolete / last-time-buy (ES suffix = engineering sample) |