EP1M120F484C8A vs EP1M120F484C6N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP1M120F484C8A sa pamamagitan ng Intel at EP1M120F484C6N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP1M120F484C8A | EP1M120F484C6N |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | Mercury (EP1M) | Mercury (APEX PLD platform) |
| Series | EP1M120 | — |
| System Gates | 120,000 | — |
| Logic Elements / Cells | 4,800 | — |
| Number of LABs/CLBs | 480 | — |
| Total RAM Bits | 49,152 | — |
| Number of User I/Os | 303 | — |
| Number of Transceivers | Integrated CDR-capable, up to 1.25 Gbps | — |
| Core Supply Voltage | 1.8 V | — |
| Packhaging | 484-ball FC-FBGA (FineLine BGA) | 484-ball FC-FBGA (FineLine BGA) |
| Package Pin Count | 484 | — |
| Temperature na Operasyon | 0 °C to +85 °C (commercial) | 0C to 85C (commercial) |
| Speed Grade | -8 (C8) | — |
| Logic Family | CMOS | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Tindminan RoHS | [DATA_NEEDED: rohs_status] | Compliant |
| Process Technology | [DATA_NEEDED: process_node] | CMOS |
| Typical Gates | — | 120,000 |
| Logic Cells / Elements | — | 4,800 |
| Logic Array Blocks (LABs) | — | 480 |
| User I/Os | — | 303 |
| Core Supply Voltage (VCCINT) | — | 1.71 V to 1.89 V (1.8 V nominal) |
| Transceiver Data Rate | — | Up to 1.25 Gbps with CDR |
| Architecture | — | LUT-based, optimized for high-speed interconnect |
| MultiCore Support | — | Yes (hot socketing) |
| Level ng MSL | — | 3 (per JEDEC J-STD-020) |