EP1M120F484C8ES vs EP1M120F484-I6 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP1M120F484C8ES sa pamamagitan ng Intel at EP1M120F484-I6 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP1M120F484C8ES | EP1M120F484-I6 |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | NRND |
| Family | ACEX 1M | Mercury FPGA |
| Manufacturer | Intel (formerly Altera) | — |
| Logic Elements / Gates | 120,000 (120K gates) | — |
| Embedded Logic Cells (EABs) | 4,800 | — |
| User I/O Pins | 303 | — |
| Packhaging | 484-ball FineLine BGA | 484-pin FBGA (FineLine BGA) |
| Speed Grade | C8 (-8 speed bin) | -6 |
| Sample Grade | ES (Engineering Sample) | — |
| Process Technology | 0.18 µm CMOS, SRAM-based | 0.18 µm CMOS |
| Embedded RAM | ~104 Kbits across 12 RAM blocks | — |
| PLLs | 4 enhanced PLLs | — |
| I/O Standards | LVTTL, LVCMOS, True-LVDS, PCI | LVTTL, LVCMOS, PCI, LVDS, LVPECL, HSTL |
| Operating Voltage (Core) | [DATA_NEEDED: core VCC range] | — |
| MultiVolt I/O Support | 1.5 V / 2.5 V / 3.3 V / 5.0 V tolerant | — |
| Configuration Method | SRAM bitstream, JTAG/serial | — |
| Temperature na Operasyon | [DATA_NEEDED: industrial/commercial grade temp range] | -40 °C to +100 °C (industrial) |
| Tindminan RoHS | [DATA_NEEDED] | — |
| Uri ng Pagpapasok | Surface Mount (BGA) | Surface Mount |
| Logic Elements (LEs) | — | 4,800 |
| Equivalent Gates | — | 120,000 |
| Logic Array Blocks (LABs) | — | 480 |
| User I/Os | — | 303 |
| High-Speed Transceivers | — | Up to 12 channels |
| Transceiver Data Rate | — | Up to 1.25 Gbps per channel |
| Core Voltage | — | 1.8 V |
| Configuration Modes | — | Passive Serial, Passive Parallel Sync/Async, JTAG, EPC device |