EP1M120F484C8ES vs EP1M120F484C8 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP1M120F484C8ES sa pamamagitan ng Intel at EP1M120F484C8 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP1M120F484C8ES | EP1M120F484C8 |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | NRND |
| Family | ACEX 1M | — |
| Manufacturer | Intel (formerly Altera) | — |
| Logic Elements / Gates | 120,000 (120K gates) | — |
| Embedded Logic Cells (EABs) | 4,800 | — |
| User I/O Pins | 303 | 303 |
| Packhaging | 484-ball FineLine BGA | 484-ball FineLine BGA (F484) |
| Speed Grade | C8 (-8 speed bin) | C8 (~8 ns pin-to-pin) |
| Sample Grade | ES (Engineering Sample) | — |
| Process Technology | 0.18 µm CMOS, SRAM-based | CMOS |
| Embedded RAM | ~104 Kbits across 12 RAM blocks | — |
| PLLs | 4 enhanced PLLs | — |
| I/O Standards | LVTTL, LVCMOS, True-LVDS, PCI | — |
| Operating Voltage (Core) | [DATA_NEEDED: core VCC range] | — |
| MultiVolt I/O Support | 1.5 V / 2.5 V / 3.3 V / 5.0 V tolerant | — |
| Configuration Method | SRAM bitstream, JTAG/serial | — |
| Temperature na Operasyon | [DATA_NEEDED: industrial/commercial grade temp range] | 0C to 85C (commercial) |
| Tindminan RoHS | [DATA_NEEDED] | [DATA_NEEDED: RoHS compliance status] |
| Uri ng Pagpapasok | Surface Mount (BGA) | Surface Mount |
| Series | — | Mercury (EP1M) |
| Device Type | — | Programmable Logic Device (PLD) |
| Logic Elements | — | 120 |
| Terminal Pitch | — | 1.00 mm |
| Seated Height | — | 2.10 mm |
| Supply Voltage (Nominal) | — | 1.8 V |
| Supply Voltage (Max) | — | 1.89 V |
| Supply Voltage (Min) | — | 1.71 V |