EP1M120F484I6 vs EP1M120B484C8A Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP1M120F484I6 sa pamamagitan ng Altera at EP1M120B484C8A sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP1M120F484I6 | EP1M120B484C8A |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Series | Mercury (EP1M) | — |
| Family | Altera / Intel Mercury programmable logic device (PLD) | Mercury (EP1M) |
| Logic Elements | 49,152 | — |
| Memory Bits | 4,800 (480 Kbits) | — |
| Number of LABs/CLBs | 480 | — |
| User I/Os | 303 | — |
| Number of Gates | [DATA_NEEDED: nominal gate count] | — |
| Core Supply Voltage | 1.8 V | — |
| Speed Grade | -6 | 8 |
| Temperature na Operasyon | 0C to +85C (Industrial) | [DATA_NEEDED: full range] |
| Package Type | 484-BBGA, FCBGA (FineLine BGA) | — |
| Pins / Balls | 484 | — |
| Logic Family | CMOS | — |
| High-Speed Transceivers | Integrated CDR-based, up to 1.25 Gbps | — |
| Transceiver Channels (1.25 Gbps) | Up to 4 channels on EP1M120 (EP1M350 up to 8) | — |
| Design Tool | Altera Quartus II | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS status not specified in verified data] | [DATA_NEEDED: check distributor] |
| Uri ng Pagpapasok | Surface Mount (BGA) | Surface Mount (BGA) |
| Logic Elements (approx.) | — | 120 |
| Packhaging | — | 484-ball FineLine BGA |
| Bilang ng Pin | — | 484 |
| Temperature Grade | — | Commercial (C) |
| Peak Reflow Temperature | — | 220 C (per JEDEC J-STD-020) |
| Logic Blocks | — | [DATA_NEEDED: LAB count] |
| Embedded Memory | — | [DATA_NEEDED: RAM bits] |
| Maximum User I/O | — | [DATA_NEEDED: user I/O count] |
| Supply Voltage Core | — | [DATA_NEEDED: VCCINT] |
| Supply Voltage I/O | — | [DATA_NEEDED: VCCIO] |
| Configuration Method | — | [DATA_NEEDED: SRAM/serial/etc.] |
| Level ng MSL | — | [DATA_NEEDED: per JEDEC J-STD-020] |