EP1S10F484C5N vs EP1S10F484I6N Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EP1S10F484C5N sa pamamagitan ng Intel at EP1S10F484I6N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EP1S10F484C5N EP1S10F484I6N
Brand Intel Intel
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle Obsolete Huling Pagbili
Series Stratix —
Family Stratix (original) Stratix
Logic Elements (LEs) 10,570 —
Logic Array Blocks (LABs) 1,057 1,057
Embedded Memory Bits 920,448 —
TriMatrix Memory Blocks 14 —
Embedded DSP Blocks 6 (≈48 9-bit multipliers) —
PLLs 4 —
Global Clock Networks 12 —
Maximum User I/O 335 335
User I/O Standard Support LVDS, LVPECL, PCI-X, RapidIO, DDR —
Process Technology 0.13 µm CMOS 130 nm CMOS
Core Voltage (VCCINT) 1.5 V 1.5 V
Maximum Internal Frequency 500 MHz (per Stratix datasheet) —
Operating Temperature (TJ) 0 °C to 85 °C (Commercial) —
Packhaging 484-ball FCBGA (F484), 23 x 23 mm, 1.0 mm pitch 484-ball FBGA (FCBGA), 23 x 23 mm, 1 mm pitch
Uri ng Pagpapasok Surface Mount Surface Mount (Flip-Chip BGA)
Configuration Method JTAG / Passive Serial / Active Serial —
Device Status Obsolete - last time buy completed —
Design Toolchain Quartus II (≤ v13.0) —
Logic Elements — 10,570
Adaptive Logic Modules (ALMs) — [DATA_NEEDED: ALM count]
Embedded Memory (Bits) — 920,448
DSP Blocks — 48
Number of PLLs — 6
Temperature na Operasyon — 0C to +85C (Industrial)
Peak Reflow Temperature — 245 C
Configuration Interface — JTAG (IEEE 1149.1), Passive Serial, Active Serial
Internal Core Speed — up to 450 MHz
Tindminan RoHS — [DATA_NEEDED: RoHS status]
Logic Family — CMOS
Terminal Finish — Tin-Silver-Copper (SnAgCu)

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