EP1S10F484C7N vs EP1S10F484C7 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP1S10F484C7N sa pamamagitan ng Intel at EP1S10F484C7 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP1S10F484C7N | EP1S10F484C7 |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Obsolete |
| Family | Stratix (EP1S) | Stratix-I (EP1S10) |
| Manufacturer | Intel (formerly Altera) | — |
| Process Technology | 130 nm CMOS | 130 nm CMOS |
| Core Voltage | 1.5 V | — |
| Logic Elements | 10,570 | — |
| Logic Array Blocks (LABs) | 1,057 | — |
| Embedded Memory (Total) | 920,448 bits | — |
| Embedded Memory Blocks | TriMatrix (M512/M4K/M-RAM) | — |
| Embedded DSP Blocks | 48 | — |
| Maximum User I/O | 335 | — |
| PLLs | 12 | 4 |
| Packhaging | 484-ball FineLine BGA (FBGA-484), 23 x 23 mm, 1 mm pitch | 484-BBGA, FCBGA (FBGA-484, 23 x 23 mm, 1.0 mm pitch) |
| Speed Grade | C7 (-7) | — |
| Operating Temperature (Commercial) | 0 C to +85 C | — |
| Configuration Methods | JTAG, Passive Serial, Passive Parallel | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Level ng MSL | [DATA_NEEDED: MSL level] | — |
| Series | — | Stratix |
| Logic Elements (LEs) | — | 10,570 |
| Number of LABs / CLBs | — | 1,057 |
| Total RAM Bits | — | 920,448 |
| User I/Os | — | 335 |
| DSP Blocks | — | 6 |
| Core Supply Voltage | — | 1.5 V |
| Temperature na Operasyon | — | 0 C to 85 C (Commercial Extended) |
| Uri ng Pagpapasok | — | Surface Mount |
| Configuration Method | — | Serial / Parallel (Quartus) |