EP1S10F780C6N vs EP1S10F780C7 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP1S10F780C6N sa pamamagitan ng Intel at EP1S10F780C7 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP1S10F780C6N | EP1S10F780C7 |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | Stratix | Stratix |
| Logic Elements (LEs) | 10,570 | — |
| Configurable Logic Blocks (CLBs) | 1,200 | — |
| Embedded Memory | 920 Kbit (TriMatrix) | — |
| Process Technology | 130 nm CMOS | 130 nm CMOS |
| Core Supply Voltage | 1.5 V | — |
| I/O Supply Voltage | Multi-voltage (3.3 V / 2.5 V / 1.8 V LVTTL/LVCMOS, LVDS) | — |
| Maximum Internal Clock Frequency | 450.05 MHz | — |
| Packhaging | FBGA-780 (29 x 29 mm, 1.0 mm pitch) | 780-ball FC-FBGA (29 × 29 mm, 1.0 mm pitch) |
| Pin / Ball Count | 780 | — |
| User I/O Count | 426 (per FindIC) | 426 |
| Temperature na Operasyon | 0 C to +85 C (Commercial) | 0 °C to 85 °C (Commercial) |
| Logic Family | CMOS | CMOS |
| Configuration Interface | JTAG (IEEE 1149.1), Passive Serial, Fast Passive Parallel, Passive Parallel Asynchronous | — |
| Lead Finish | SnPb (LEAD FR / non-RoHS variant) | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount (BGA) |
| Tindminan RoHS | Non-compliant (LEAD FR finish per AiPCBA datasheet) | Non-compliant (per third-party distributor listing) |
| Level ng MSL | [DATA_NEEDED: MSL rating] | [DATA_NEEDED: MSL level] |
| Logic Elements | — | 10,570 |
| Total RAM Bits | — | 920,448 |
| Core Voltage | — | 1.5 V |
| Speed Grade | — | C7 |
| Maximum Internal Frequency | — | 420.17 MHz |
| Configuration Modes | — | Passive Serial, Fast Passive Parallel, Passive Parallel Asynchronous, JTAG |
| DSP Blocks | — | Yes (embedded) |
| I/O Standards Supported | — | LVTTL, LVCMOS, LVDS, SSTL, HSTL (per bank) |