EP1S10F780C6N vs EP1S25F780C6N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP1S10F780C6N sa pamamagitan ng Intel at EP1S25F780C6N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP1S10F780C6N | EP1S25F780C6N |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | NRND |
| Family | Stratix | Stratix |
| Logic Elements (LEs) | 10,570 | — |
| Configurable Logic Blocks (CLBs) | 1,200 | — |
| Embedded Memory | 920 Kbit (TriMatrix) | 1,944,576 bits |
| Process Technology | 130 nm CMOS | 130 nm |
| Core Supply Voltage | 1.5 V | — |
| I/O Supply Voltage | Multi-voltage (3.3 V / 2.5 V / 1.8 V LVTTL/LVCMOS, LVDS) | — |
| Maximum Internal Clock Frequency | 450.05 MHz | — |
| Packhaging | FBGA-780 (29 x 29 mm, 1.0 mm pitch) | 780-BGA (FC-FBGA, FineLine) |
| Pin / Ball Count | 780 | — |
| User I/O Count | 426 (per FindIC) | 597 |
| Temperature na Operasyon | 0 C to +85 C (Commercial) | 0C to +85C (Commercial) |
| Logic Family | CMOS | — |
| Configuration Interface | JTAG (IEEE 1149.1), Passive Serial, Fast Passive Parallel, Passive Parallel Asynchronous | — |
| Lead Finish | SnPb (LEAD FR / non-RoHS variant) | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Tindminan RoHS | Non-compliant (LEAD FR finish per AiPCBA datasheet) | Compliant |
| Level ng MSL | [DATA_NEEDED: MSL rating] | — |
| Logic Elements | — | 25,660 |
| Total RAM Bits | — | 1,944,576 |
| Number of LABs | — | 2,566 |
| DSP Blocks | — | 80 |
| PLLs | — | 12 |
| Core Voltage | — | 1.5 V |
| Configuration Method | — | JTAG, Passive Serial, Passive Parallel |
| Speed Grade | — | C6 |