EP1S10F780C7 vs EP1S10F780I6 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP1S10F780C7 sa pamamagitan ng Intel at EP1S10F780I6 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EP1S10F780I6 - Stratix FPGA, 10570 Cells, 780-BGA | Altera/Intel
EP1S10F780I6 ⚠ Huling PagbiliPagsanggunian na paghahambing
| Parametro | EP1S10F780C7 | EP1S10F780I6 |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Huling Pagbili |
| Family | Stratix | Stratix |
| Logic Elements | 10,570 | — |
| Total RAM Bits | 920,448 | — |
| User I/O Count | 426 | — |
| Core Voltage | 1.5 V | — |
| Process Technology | 130 nm CMOS | CMOS |
| Packhaging | 780-ball FC-FBGA (29 × 29 mm, 1.0 mm pitch) | 780-ball FineLine BGA (FBGA-780), 29 x 29 mm, 1.0 mm pitch |
| Uri ng Pagpapasok | Surface Mount (BGA) | — |
| Temperature na Operasyon | 0 °C to 85 °C (Commercial) | — |
| Speed Grade | C7 | 6 |
| Maximum Internal Frequency | 420.17 MHz | — |
| Configuration Modes | Passive Serial, Fast Passive Parallel, Passive Parallel Asynchronous, JTAG | Passive Serial (PS), Fast Passive Parallel (FPP), JTAG |
| DSP Blocks | Yes (embedded) | — |
| I/O Standards Supported | LVTTL, LVCMOS, LVDS, SSTL, HSTL (per bank) | — |
| Level ng MSL | [DATA_NEEDED: MSL level] | — |
| Tindminan RoHS | Non-compliant (per third-party distributor listing) | Compliant (lead-free FBGA package) |
| Logic Family | CMOS | — |
| Logic Elements / Cells | — | 10,570 cells |
| Configurable Logic Blocks (CLBs) | — | 1,200 |
| Logic Array Blocks (LABs) | — | 1,057 |
| Embedded Memory (RAM bits) | — | 920,448 bits |
| Maximum User I/Os | — | 426 |
| Maximum Operating Frequency | — | 450 MHz |
| Core Supply Voltage | — | 1.5 V |
| Operating Temperature (Industrial, I suffix) | — | -40C to +100C |
| PLLs | — | 8 |