EP1S10F780I6 vs EP1S10F780C5 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP1S10F780I6 sa pamamagitan ng Altera at EP1S10F780C5 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EP1S10F780I6 - Stratix FPGA, 10570 Cells, 780-BGA | Altera/Intel
EP1S10F780I6 ⚠ Huling PagbiliPagsanggunian na paghahambing
| Parametro | EP1S10F780I6 | EP1S10F780C5 |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Huling Pagbili | Obsolete |
| Family | Stratix | Stratix |
| Logic Elements / Cells | 10,570 cells | — |
| Configurable Logic Blocks (CLBs) | 1,200 | — |
| Logic Array Blocks (LABs) | 1,057 | — |
| Embedded Memory (RAM bits) | 920,448 bits | — |
| Maximum User I/Os | 426 | — |
| Maximum Operating Frequency | 450 MHz | — |
| Core Supply Voltage | 1.5 V | 1.5 V |
| Process Technology | CMOS | 0.13 micrometer, all-layer copper CMOS, SRAM |
| Packhaging | 780-ball FineLine BGA (FBGA-780), 29 x 29 mm, 1.0 mm pitch | 780-ball FineLine BGA (FC-FBGA) |
| Operating Temperature (Industrial, I suffix) | -40C to +100C | — |
| Speed Grade | 6 | C5 |
| PLLs | 8 | — |
| Configuration Modes | Passive Serial (PS), Fast Passive Parallel (FPP), JTAG | — |
| Tindminan RoHS | Compliant (lead-free FBGA package) | [DATA_NEEDED: RoHS status] |
| Logic Elements (LEs) | — | 10,570 |
| Total RAM Bits | — | 920,448 |
| DSP Blocks | — | Up to 28 |
| Embedded Multipliers | — | Up to 224 (9-bit x 9-bit) |
| User I/Os | — | 426 |
| Internal Operating Frequency | — | Up to 500 MHz |
| LABs (Logic Array Blocks) | — | 1057 |
| Configuration | — | SRAM-based, volatile |
| Operating Temperature Grade | — | Commercial (C5 speed grade) |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |